Mitsubishi Electric NZ2GN2S-D41P01 User Manual page 610

Cc-link ie tsn fpga module
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Pulse output part output pulse count
■Address
Name
Pulse output part output pulse count (lower side) (B0) (usr_rreg_1CB)
Pulse output part output pulse count (upper side) (B0) (usr_rreg_1CC)
Pulse output part output pulse count (lower side) (B1) (usr_rreg_1CD)
Pulse output part output pulse count (upper side) (B1) (usr_rreg_1CE)
Pulse output part output pulse count (lower side) (B2) (usr_rreg_1CF)
Pulse output part output pulse count (upper side) (B2) (usr_rreg_1D0)
Pulse output part output pulse count (lower side) (E0) (usr_rreg_1D1)
Pulse output part output pulse count (upper side) (E0) (usr_rreg_1D2)
Pulse output part output pulse count (lower side) (E1) (usr_rreg_1D3)
Pulse output part output pulse count (upper side) (E1) (usr_rreg_1D4)
Pulse output part output pulse count (lower side) (E2) (usr_rreg_1D5)
Pulse output part output pulse count (upper side) (E2) (usr_rreg_1D6)
■Description
Counts the number of pulse outputs.
■FPGA initial value
0000H
■Firmware initial value
■Reset cause
Reset
Maximum A/D conversion value
■Address
Name
Maximum A/D conversion value CH0 (usr_rreg_1D7)
Maximum A/D conversion value CH1 (usr_rreg_1D8)
Maximum A/D conversion value CH2 (usr_rreg_1D9)
Maximum A/D conversion value CH3 (usr_rreg_1DA)
Maximum A/D conversion value CH4 (usr_rreg_1DB)
Maximum A/D conversion value CH5 (usr_rreg_1DC)
Maximum A/D conversion value CH6 (usr_rreg_1DD)
Maximum A/D conversion value CH7 (usr_rreg_1DE)
Maximum A/D conversion value CH8 (usr_rreg_1DF)
Maximum A/D conversion value CH9 (usr_rreg_1E0)
Maximum A/D conversion value CHA (usr_rreg_1E1)
Maximum A/D conversion value CHB (usr_rreg_1E2)
■Description
Stores the maximum A/D conversion value of the circuit board selected by the maximum/minimum A/D conversion value
selection register.
■FPGA initial value
8000H
■Firmware initial value
■Reset cause
Reset
APPX
608
Appendix 4 FPGA register
FPGA register address
1000_BB96H
1000_BB98H
1000_BB9AH
1000_BB9CH
1000_BB9EH
1000_BBA0H
1000_BBA2H
1000_BBA4H
1000_BBA6H
1000_BBA8H
1000_BBAAH
1000_BBACH
FPGA register address
1000_BBAEH
1000_BBB0H
1000_BBB2H
1000_BBB4H
1000_BBB6H
1000_BBB8H
1000_BBBAH
1000_BBBCH
1000_BBBEH
1000_BBC0H
1000_BBC2H
1000_BBC4H

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