Mitsubishi Electric NZ2GN2S-D41P01 User Manual page 544

Cc-link ie tsn fpga module
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ADC range setting
■Address
Name
ADC range setting CH0 to 3 (E0) (aiport_ade0_0-3_range)
ADC range setting CH4 to 7 (E0) (aiport_ade0_4-7_range)
ADC range setting CH8 to B (E0) (aiport_ade0_8-B_range)
ADC range setting CH0 to 3 (E1) (aiport_ade1_0-3_range)
ADC range setting CH4 to 7 (E1) (aiport_ade1_4-7_range)
ADC range setting CH8 to B (E1) (aiport_ade1_8-B_range)
ADC range setting CH0 to 3 (E2) (aiport_ade2_0-3_range)
ADC range setting CH4 to 7 (E2) (aiport_ade2_4-7_range)
ADC range setting CH8 to B (E2) (aiport_ade2_8-B_range)
■Description
Sets the ADC range.
b15
b14
b13
CH3 ADC range setting (E)
CH7 ADC range setting (E)
CHB ADC range setting (E)
• 0H: -19.8 to 19.8mA
• 2H: -9.9 to 9.9V
■FPGA initial value
3H
■Firmware initial value
2H
■Reset cause
Reset
■Precautions and restrictions
When a DC I/O circuit board or Differential I/O circuit board is connected to E, the settings are disabled.
The FPGA initial value 3H is the system initial value. Set 0H or 2H when setting the range.
APPX
542
Appendix 4 FPGA register
b12
b11
b10
b9
CH2 ADC range setting (E)
CH6 ADC range setting (E)
CHA ADC range setting (E)
b8
b7
b6
b5
CH1 ADC range setting (E)
CH5 ADC range setting (E)
CH9 ADC range setting (E)
FPGA register address
1000_6100H
1000_6102H
1000_6104H
1000_6106H
1000_6108H
1000_610AH
1000_610CH
1000_610EH
1000_6110H
b4
b3
b2
b1
CH0 ADC range setting (E)
CH4 ADC range setting (E)
CH8 ADC range setting (E)
b0

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