Fpga Register Details (Digital Output Control Part) - Mitsubishi Electric NZ2GN2S-D41P01 User Manual

FPGA register details (digital output control part)

Output signal selection
■Address
Name
Output signal selection (B0) (oport_iob0y_osel)
Output signal selection (B1) (oport_iob1y_osel)
Output signal selection (B2) (oport_iob2y_osel)
Output signal selection (E0) (oport_ioe0y_osel)
Output signal selection (E1) (oport_ioe1y_osel)
Output signal selection (E2) (oport_ioe2y_osel)
■Description
Sets the signal to output to the DC/differential (RS-422) output.
b15 b14 b13
IOB_ IOB_ IOB_
YF YE YD
IOE_ IOE_ IOE_
YF YE YD
Setting value
1: Select the user circuit output.
0: Select the register setting value (oport_ioby_odata: RY) and
the register setting value (oport_ioey_odata: RY).
■FPGA initial value
0000H
■Firmware initial value
0000H
■Reset cause
Reset
■Precautions and restrictions
• When a differential I/O circuit board is connected to B or E, the b15 to b8 settings are disabled.
• When an analog I/O circuit board is connected to E, the settings are disabled.
APPX
530
Appendix 4 FPGA register
b12 b11 b10 b9
IOB_ IOB_ IOB_ IOB_
YC YB YA Y9
IOE_ IOE_ IOE_ IOE_
YC YB YA Y9
b8 b7 b6
IOB_ IOB_ IOB_
Y8 Y7 Y6
IOE_ IOE_ IOE_
Y8 Y7 Y6
Description
Digital output signals (B) (uc_iob_y_clk100m_reg) and digital output signals (E)
(uc_ioe_y_clk100m_reg) from the user circuit part are output to DC/differential (RS-422)
output.
The values set for the output value setting (B) and output value setting (E) are output to
the DC/differential (RS-422) output. The output value setting (B) and output value setting
(E) store the remote output signal (RY) value by firmware.
FPGA register address
1000_4000H
1000_4002H
1000_4004H
1000_4008H
1000_400AH
1000_400CH
b5 b4 b3 b2
IOB_ IOB_ IOB_ IOB_
Y5 Y4 Y3 Y2
IOE_ IOE_ IOE_ IOE_
Y5 Y4 Y3 Y2
b1 b0
IOB_ IOB_
Y1 Y0
IOE_ IOE_
Y1 Y0