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Minimum A/D conversion value
■Address
Name
Minimum A/D conversion value CH0 (usr_rreg_1E3)
Minimum A/D conversion value CH1 (usr_rreg_1E4)
Minimum A/D conversion value CH2 (usr_rreg_1E5)
Minimum A/D conversion value CH3 (usr_rreg_1E6)
Minimum A/D conversion value CH4 (usr_rreg_1E7)
Minimum A/D conversion value CH5 (usr_rreg_1E8)
Minimum A/D conversion value CH6 (usr_rreg_1E9)
Minimum A/D conversion value CH7 (usr_rreg_1EA)
Minimum A/D conversion value CH8 (usr_rreg_1EB)
Minimum A/D conversion value CH9 (usr_rreg_1EC)
Minimum A/D conversion value CHA (usr_rreg_1ED)
Minimum A/D conversion value CHB (usr_rreg_1EE)
■Description
Stores the minimum A/D conversion value of the circuit board selected by the maximum/minimum A/D conversion value
selection register.
■FPGA initial value
7FFFH
■Firmware initial value
■Reset cause
Reset
FPGA register address
1000_BBC6H
1000_BBC8H
1000_BBCAH
1000_BBCCH
1000_BBCEH
1000_BBD0H
1000_BBD2H
1000_BBD4H
1000_BBD6H
1000_BBD8H
1000_BBDAH
1000_BBDCH
APPX
609
Appendix 4 FPGA register
A
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Troubleshooting
