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No.
Block diagram No.
Connection signal name
274
re_rs_usr_wreg_168_clk100m_reg[0]
277
re_rs_usr_wreg_180_clk100m_reg[1:0]
278
re_rs_usr_wreg_181_clk100m_reg[0]
279
re_rs_usr_wreg_188_clk100m_reg[0]
280
re_rs_usr_wreg_189_clk100m_reg[15:0]
281
re_rs_usr_wreg_18a_clk100m_reg[15:0]
282
re_rs_usr_wreg_18b_clk100m_reg[0]
283
re_rs_usr_wreg_18c_clk100m_reg[15:0]
284
re_rs_usr_wreg_18d_clk100m_reg[15:0]
285
re_rs_usr_wreg_18e_clk100m_reg[0]
286
re_rs_usr_wreg_18f_clk100m_reg[15:0]
287
re_rs_usr_wreg_190_clk100m_reg[15:0]
288
re_rs_usr_wreg_191_clk100m_reg[0]
289
re_rs_usr_wreg_192_clk100m_reg[15:0]
290
re_rs_usr_wreg_193_clk100m_reg[15:0]
291
re_rs_usr_wreg_194_clk100m_reg[0]
292
re_rs_usr_wreg_195_clk100m_reg[15:0]
293
re_rs_usr_wreg_196_clk100m_reg[15:0]
294
re_rs_usr_wreg_197_clk100m_reg[0]
295
re_rs_usr_wreg_198_clk100m_reg[15:0]
296
re_rs_usr_wreg_199_clk100m_reg[15:0]
297
re_rs_usr_wreg_1a0_clk100m_reg[0]
298
re_rs_usr_wreg_1a1_clk100m_reg[15:0]
299
re_rs_usr_wreg_1a2_clk100m_reg[15:0]
300
re_rs_usr_wreg_1a3_clk100m_reg[0]
301
re_rs_usr_wreg_1a4_clk100m_reg[15:0]
302
re_rs_usr_wreg_1a5_clk100m_reg[15:0]
303
re_rs_usr_wreg_1a6_clk100m_reg[0]
304
re_rs_usr_wreg_1a7_clk100m_reg[15:0]
305
re_rs_usr_wreg_1a8_clk100m_reg[15:0]
306
re_rs_usr_wreg_1a9_clk100m_reg[0]
307
re_rs_usr_wreg_1aa_clk100m_reg[15:0]
308
re_rs_usr_wreg_1ab_clk100m_reg[15:0]
309
re_rs_usr_wreg_1ac_clk100m_reg[0]
310
re_rs_usr_wreg_1ad_clk100m_reg[15:0]
311
re_rs_usr_wreg_1ae_clk100m_reg[15:0]
312
re_rs_usr_wreg_1af_clk100m_reg[0]
313
re_rs_usr_wreg_1b0_clk100m_reg[15:0]
314
re_rs_usr_wreg_1b1_clk100m_reg[15:0]
315
re_rs_usr_wreg_1b8_clk100m_reg[0]
316
re_rs_usr_wreg_1b9_clk100m_reg[0]
317
re_rs_usr_wreg_1ba_clk100m_reg[0]
318
re_rs_usr_wreg_1bb_clk100m_reg[0]
319
re_rs_usr_wreg_1bc_clk100m_reg[0]
320
re_rs_usr_wreg_1bd_clk100m_reg[0]
321
re_rs_usr_wreg_1c0_clk100m_reg[15:0]
322
re_rs_usr_wreg_1c1_clk100m_reg[15:0]
323
re_rs_usr_wreg_1c2_clk100m_reg[15:0]
324
re_rs_usr_wreg_1c3_clk100m_reg[15:0]
325
re_rs_usr_wreg_1c4_clk100m_reg[15:0]
326
re_rs_usr_wreg_1c5_clk100m_reg[15:0]
327
re_rs_usr_wreg_1c6_clk100m_reg[2:0]
Register address
1000_B2D0H
1000_B300H
1000_B302H
1000_B310H
1000_B312H
1000_B314H
1000_B316H
1000_B318H
1000_B31AH
1000_B31CH
1000_B31EH
1000_B320H
1000_B322H
1000_B324H
1000_B326H
1000_B328H
1000_B32AH
1000_B32CH
1000_B32EH
1000_B330H
1000_B332H
1000_B340H
1000_B342H
1000_B344H
1000_B346H
1000_B348H
1000_B34AH
1000_B34CH
1000_B34EH
1000_B350H
1000_B352H
1000_B354H
1000_B356H
1000_B358H
1000_B35AH
1000_B35CH
1000_B35EH
1000_B360H
1000_B362H
1000_B370H
1000_B372H
1000_B374H
1000_B376H
1000_B378H
1000_B37AH
1000_B380H
1000_B382H
1000_B384H
1000_B386H
1000_B388H
1000_B38AH
1000_B38CH
11 FPGA INTERNAL CIRCUIT
11.4 User Circuit Block
11
245
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Troubleshooting
