Fpga Register Details (Reset Control Part) - Mitsubishi Electric NZ2GN2S-D41P01 User Manual

FPGA register details (reset control part)

The details of the FPGA register of the reset control part are shown below.
Internal operation start/stop
■Address
Name
Internal operation start/stop (mode_ctrl2)
■Description
Use for FPGA internal operation start/stop.
Firmware controls the FPGA control start processing and FPGA control stop processing.
b15 b14 b13 b12
0 (fixed)
(1) Internal operation start/stop
• 0: Stop
• 1: Start
■FPGA initial value
0
■Firmware initial value
0
■Reset cause
Reset
Module type (main)
■Address
Name
Module type (basic) (unit_set_base)
■Description
The module type of the circuit board connected to the connector (B0 to B2) of the main module is stored.
b15 b14 b13 b12
0 (fixed)
(1) Module type (B0) (IOB0_UNIT[3:0])
• 0001: DC I/O circuit board
• 0010: Differential I/O circuit board
(2) Module type (B1) (IOB1_UNIT[3:0])
• 0001: DC I/O circuit board
• 0010: Differential I/O circuit board
(3) Module type (B2) (IOB2_UNIT[3:0])
• 0001: DC I/O circuit board
• 0010: Differential I/O circuit board
■FPGA initial value
0000H
■Firmware initial value

■Reset cause
Reset
b11 b10 b9 b8
b11 b10 b9 b8
(3)
b7 b6 b5 b4
b7 b6 b5 b4
(2)
FPGA register address
1000_0002H
b3 b2 b1 b0
(1)
FPGA register address
1000_0004H
b3 b2 b1 b0
(1)
APPX
519
Appendix 4 FPGA register
A