Mitsubishi Electric NZ2GN2S-D41P01 User Manual page 372

Cc-link ie tsn fpga module
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Implementation method and check method
Check that the digital signal input to X0 (B0) is inverted and the inverted signal is output.
Follow the steps below to monitor the FPGA register using the FPGA Module Configuration Tool.
Operating procedure
1.
After writing the parameters, turn the power off and on to restart the module.
2.
Input a digital signal from the sensor to X0 (B0).
3.
In "Device/Register batch monitor", monitor the following FPGA register and check that the input digital signal to X0 (B0)
is inverted and output from bit 0.
[Menu]  [Device/Register batch monitor]
Address
1000_4020H
13 SAMPLE CIRCUIT IN STANDALONE MODE
370
13.1 When Using the Inversion Output Function
Name
Output signal monitor (B0) (iport_iob0y_monitor)

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