When Using The Pulse Count Function - Mitsubishi Electric NZ2GN2S-D41P01 User Manual

14.3

When Using the Pulse Count Function

This section describes the function to count pulses with the width of 100s input to External input signals X1 (B0) and X2 (B0)
with 2-phase multiple of 4 with the upper limit value of 4294967295, and to monitor them with the CPU device.
FPGA parameter
The setting values of the FPGA parameters to be set are shown below.
Setting item
Data sampling timing (B0)
Input filter upper limit value X1 (B0)
Input filter upper limit value X2 (B0)
User circuit part parameter
The setting values of the user circuit part parameters to be set are shown below.
Address

1000_B146H (writing data 163)
1000_B148H (writing data 164)
1000_B14AH (writing data 165)
Setting method
The procedure using the FPGA Module Configuration Tool is shown below.
Operating procedure
1.
Create the project with the following settings.
Set NZ2GN2S-D41P01 as the connected main module and NZ2EX2S-D41A01 as the connection extension module.
[Project]  [New]
2.
Click the [OK] button.
3.
Enter the IP address of the FPGA module to be connected in the "Connection destination setting" window.
[Menu]  [Connection destination setting]
4.
Click the [Communication Test] button.
5.
Click the [OK] button.
6.
Click the [Apply] button.
Setting item
User circuit part parameter size
Counter control part 32-bit ring counter (2-phase multiple of 4) counter upper limit value (lower side)
(B0) (usr_wreg_0A3)
Counter control part 32-bit ring counter (2-phase multiple of 4) counter upper limit value (upper
side) (B0) (usr_wreg_0A4)
Counter control part 32-bit ring counter (2-phase multiple of 4) input signal selection (B0)
(usr_wreg_0A5)
14 SAMPLE CIRCUIT IN CC-LINK IE TSN COMMUNICATION MODE
Setting value
0.10s
100
100
14.3 When Using the Pulse Count Function
Setting
value
14
384
FFFFH
FFFFH
0302H
405