Details Of Remote Buffer Memory - Mitsubishi Electric NZ2GN2S-D41P01 User Manual

Details of remote buffer memory

This section describes the details of remote buffer memory addresses of FPGA module.
User switch enable/disable
■Address
Name
User switch enable/disable
■Description
Enables or disables USER switch (function setting switch 7) to USER switch (function setting switch 10).
b15 b14 b13 b12
0 (fixed)
(1) USER switch
0: Disable (Default)
1: Enable
When enabled (1), the corresponding bit of Always write register 0 (usr_alwreg_00) in the user circuit part can be operated
from the USER switch. The correspondence between USER switches and Always write register 0 (usr_alwreg_00) is shown
below.
• USER switch (function setting switch 7): Always write register 0 (usr_alwreg_00) (FPGA register address: 1000_A010H) b3
• USER switch (function setting switch 8): Always write register 0 (usr_alwreg_00) (FPGA register address: 1000_A010H) b2
• USER switch (function setting switch 9): Always write register 0 (usr_alwreg_00) (FPGA register address: 1000_A010H) b1
• USER switch (function setting switch 10): Always write register 0 (usr_alwreg_00) (FPGA register address: 1000_A010H)
b0
For details on the USER switch (function setting switch 7) to USER switch (function setting switch 10), refer to the following.
Page 58 Setting the function setting switches
■Enabling the setting
It is reflected when starting FPGA control.
FPGA control automatic start setting
■Address
Name
FPGA control automatic start setting
■Description
Sets whether to automatically start FPGA control after FPGA configuration is complete.
b15 b14 b13 b12
0 (fixed)
(1) FPGA control automatic start setting
0: Disable (Default)
1: Enable
■Enabling the setting
When Parameter save request (RY2) is turned on and off, the setting is enabled.
b11 b10 b9 b8
b11 b10 b9 b8
Remote buffer memory address
04D0H
b7 b6 b5 b4
Remote buffer memory address
04D1H
b7 b6 b5 b4
Appendix 3 Remote Buffer Memory
b3 b2 b1 b0
(1)
b3 b2 b1 b0
(1)
APPX
491
A