Mitsubishi Electric NZ2GN2S-D41P01 User Manual page 461

Cc-link ie tsn fpga module
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Error code
Classification
(hexadecimal)
*1
311H
Moderate
*1
32H
Moderate
*1
33H
Moderate
*1
340H
Moderate
*1
3500H
Moderate
*1
3501H
Moderate
*2
3A00H
Moderate
*2
3A10H
Moderate
*2
3A20H
Moderate
Error name
Description and cause
Output signal/Input
A value other than Register setting value
output direction
(0H) and User circuit output (3H) is set for
signal selection
Output signal/Input output direction signal
(E) setting error
selection (E) (address: 1000_5028H to
1000_502CH).
ADC range setting
A value other than -19.8 to 19.8mA (0H)
CH (E) setting
and -9.9 to 9.9V (2H) is set for CH of
error
ADC range setting CH0-B (E)(FPGA
register address: 1000_6100H to
1000_6110H).
DAC range setting
A value other than -9.9 to 9.9V (3H) and
CH (E) setting
0.2 to 19.8mA (4H) is set for DAC range
error
setting CH (E) (remote buffer memory
address: 0602H, 0606H, 060AH, 060EH,
0612H, 0616H).
D/A conversion
Only for some of the following FPGA
signal selection
register areas, the user circuit is selected
(E) setting error
as a signal used for D/A conversion.
• D/A conversion value selection (FPGA
register address: 1000_7002H)
• D/A conversion timing selection (FPGA
register address: 1000_7004H)
• DAC LDAC signal selection (FPGA
register address: 1000_7006H)
Logging data size
A value other than 256 records (0H) to
setting error
524288 records (BH) is set for Logging
data size setting (FPGA register address:
1000_9008H).
Number of sampling
The setting value of Number of sampling
times after trigger
times after trigger setting (FPGA register
setting error
address: 1001_9000H, 1001_9002H) is
invalid.
• 0 is set.
• A value equal to or greater than the
number of records set in Logging data
size setting (FPGA register address:
1000_9008H) is set.
Module
The type of an extension module mounted
configuration error
(including the case where no extension
module is mounted) is different from the
extension module type when the parameter
was saved.
Incompatible FPGA
The firmware version is not compatible with
version error
FPGA configuration data.
Configuration ROM
An error was detected during access to the
access error
configuration ROM, and the operation was
completed with an error.
Action
Set Output signal/Input/output direction
signal selection (E) (address:
1000_5028H to 1000_502CH) to Register
setting value (0H) or User circuit output
(3H).
Set CH of ADC range setting CH0-B
(E)(FPGA register address: 1000_6100H
to 1000_6110H) to a value within -19.8 to
19.8mA (0H) or -9.9 to 9.9V (2H).
Set DAC range setting CH (E) (remote
buffer memory address: 0602H, 0606H,
060AH, 060EH, 0612H, 0616H) to a value
within -9.9 to 9.9V (3H) or 0.2 to 19.8mA
(4H).
When performing D/A conversion with the
output of the user circuit, set the E
setting of the following FPGA register areas
and set User circuit output to Select (1).
Alternatively, reset 0b if D/A conversion is
not performed on the output of the user
circuit.
• D/A conversion value selection (FPGA
register address: 1000_7002H)
• D/A conversion timing selection (FPGA
register address: 1000_7004H)
• DAC LDAC signal selection (FPGA
register address: 1000_7006H)
Set Logging data size setting (FPGA
register address: 1000_9008H) to a value
within 256 records (0H) to 524288 records
(BH).
Set Number of sampling times after trigger
setting (FPGA register address:
1001_9000H, 1001_9002H) to a value
within 1 to (number of records - 1).
• After setting the parameter again,
execute "Parameter write (Memory +
Non-volatile memory)" from the FPGA
Module Configuration Tool. Alternatively,
turn on and off Parameter save request
(RY2), and then save the parameter to
non-volatile memory. Then, turn off and
on the module power supply.
• When the type of extension module
mounted is the same as the type when
the parameter was saved, the possible
cause is noise effects. Take measures to
reduce noise.
• If this error occurs again after the
measures above are taken, the possible
cause is a module failure. Please consult
your local Mitsubishi representative.
Update the firmware to the version
compatible with FPGA version.
• Turn off and on the module power
supply, and perform an FPGA download
again.
• If this error occurs again, the possible
cause is a module failure. Please consult
your local Mitsubishi representative.
24 ERROR CODE LIST
24
459

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