Chapter 19. Usage Notes; Stop Mode And Wait Mode; Interrupts; Reading Address 0000016 - Renesas M16C FAMILY Hardware Manual

Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/11 Group
19. Usage Notes

19.1 Stop Mode and Wait Mode

When entering stop mode or wait mode, an instruction queue pre-reads 4 bytes from the WAIT instruction
or an instruction that sets the CM10 bit in the CM1 register to "1" (all clocks stopped) before the program
stops. Therefore, insert at least four NOPs after the WAIT instruction or an instruction that sets the CM10
bit to "1".

19.2 Interrupts

19.2.1 Reading Address 00000
Avoid reading the address 00000
CPU reads interrupt information (interrupt number and interrupt request priority level) from the ad-
dress 00000
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"0".
If the address 00000
among the enabled interrupts is set to "0". This may cause a problem that the interrupt is canceled, or
an unexpected interrupt is generated.

19.2.2 SP Setting

Set any value in the SP before accepting an interrupt. The SP is set to '0000
if an interrupt is accepted before setting any value in the SP, the program may go out of control.

19.2.3 External Interrupt and Key Input Interrupt

Either an "L" level or an "H" level of at least 250 ns width is necessary for the signal input to the INT
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to INT pins and KI
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19.2.4 Watchdog Timer Interrupt

Initialize the watchdog timer after a watchdog timer interrupt occurs.
19.2.5 Changing Inerrupt Source
The IR bit in the corresponding interrupt control register may be set to "1" (interrupt requested) when
the interrupt source changes. When using an interrupt, the corresponding IR bit should be set to "0"
(no interrupt requested) after changing the interrupt source.
In addition, the changes of interrupt sources said here include all factors that change the interrupt
sources assigned to individual software interrupt numbers, polarities, and timing. Therefore, when a
mode change in the peripheral functions etc. involves interrupt sources, edge polarities, and timing,
the corresponding IR bit should be set to "0" (no interrupt requested) after the change. Refer to the
description of each peripheral function for the interrupts caused by the peripheral functions. Figure 1.1
shows an example of the procedure for changing interrupt sources.
Rev.0.91 2003 Sep 08
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in a program. When a maskable interrupt request is accepted, the
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during the interrupt sequence. At this time, the IR bit for the accepted interrupt is set to
is read in a program, the IR bit for the interrupt which has the highest priority
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to KI pins regardless of the CPU clock.
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page 170 of 184
19. Usage Notes
' after reset. Therefore,
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0