Table 207. Iwdg Register Map And Reset Values - ST STM32L4 5 Series Reference Manual

RM0351
36.4.6 IWDG register map
The following table gives the IWDG register map and reset values.
Offset Register
IWDG_KR
0x00
Reset value
IWDG_PR
0x04
Reset value
IWDG_RLR
0x08
Reset value
IWDG_SR
0x0C
Reset value
IWDG_WINR
0x10
Reset value
Refer to
boundary addresses.

Table 207. IWDG register map and reset values

Section 2.2.2: Memory map and register boundary addresses
0
DocID024597 Rev 5
Independent watchdog (IWDG)
KEY[15:0]
0 0 0 0 0 0 0 0 0
RL[11:0]
1 1 1 1 1 1
WIN[11:0]
1 1 1 1 1 1
for the register
0 0 0 0 0 0
PR[2:0]
0 0 0
1 1 1 1 1 1
0 0 0
1 1 1 1 1 1
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