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Low-power timer (LPTIM)
34.7.6
LPTIM compare register (LPTIM_CMP)
Address offset: 0x14
Reset value: 0x0000 0000
31
30
29
28
Res.
Res.
Res.
Res.
15
14
13
12
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 CMP: Compare value
CMP is the compare value used by the LPTIM.
The LPTIM_CMP register's content must only be modified when the LPTIM is enabled (ENABLE bit
is set to '1').
34.7.7
LPTIM autoreload register (LPTIM_ARR)
Address offset: 0x18
Reset value: 0x0000 0001
31
30
29
28
Res.
Res.
Res.
Res.
15
14
13
12
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 ARR: Auto reload value
ARR is the autoreload value for the LPTIM.
This value must be strictly greater than the CMP[15:0] value.
The LPTIM_ARR register's content must only be modified when the LPTIM is enabled (ENABLE bit
is set to '1').
1166/1830
27
26
25
24
Res.
Res.
Res.
Res.
11
10
9
8
27
26
25
24
Res.
Res.
Res.
Res.
11
10
9
8
DocID024597 Rev 5
23
22
21
Res.
Res.
Res.
7
6
5
CMP[15:0]
rw
23
22
21
Res.
Res.
Res.
7
6
5
ARR[15:0]
rw
20
19
18
17
Res.
Res.
Res.
Res.
4
3
2
1
20
19
18
17
Res.
Res.
Res.
Res.
4
3
2
1
RM0351
16
Res.
0
16
Res.
0
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