ST STM32L4 5 Series Reference Manual page 1230

Real-time clock (RTC)
Offset Register
RTC_ CALR
0x3C
Reset value
RTC_TAMPCR
0x40
Reset value
RTC_
ALRMASSR
0x44
Reset value
RTC_
ALRMBSSR
0x48
Reset value
RTC_ OR
0x4C
Reset value
RTC_BKP0R
Reset value 0
0x50
to 0xCC
to
RTC_BKP31R
Reset value 0
Refer to
1230/1830
Table 214. RTC register map and reset values (continued)
0 0
MASKSS
[3:0]
0 0 0 0
MASKSS
[3:0]
0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Section 2.2.2 on page 75
0
0 0 0 0 0 0 0 0
BKP[31:0]
0 0 0 0 0 0 0 0
BKP[31:0]
0 0 0 0 0 0 0 0
for the register boundary addresses.
DocID024597 Rev 5
0 0 0 0 0
0 0 0 0 0 0 0 0 0
SS[14:0]
0 0 0 0 0 0 0 0 0
SS[14:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
RM0351
CALM[8:0]
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0
0 0 0 0 0 0
0 0 0 0 0 0