Programming Sequence; Reset Module To Default State - HP E1313A Manual

High speed a/d module
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Programming Sequence

Notes

Reset Module to Default State

Set up A24 Memory
Reset DSP Chip
382
Register-Based Programming
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This guide is only a sequence of register offsets and values to write to them.
It is assumed that you have already studied the details of accessing registers
and executing register-based commands in this chapter. You must follow
register sequence exactly as shown.
1. See VXIbus Specification sections C.2.1.1.2 and C.4.1.3 for address
map configuration. Example shown programs HP E1413's A24 map
to begin at address 200000
2. After every Command written to Command Register 08, the
controller must wait for DONE (bit 7) and READY (bit 3) to be
asserted in VXI Status register 04 before writing the next command.
3. After every Query written to Register 08, the controller must wait for
DONE (bit 7) and Query Response Ready (bit 1) to be asserted in
VXI Status Register 04 before reading Query Response from Query
Response Register 08.
4. When sending a command which includes parameters, the Parameter
Registers (0A
, 0C
16
Register 08.
5. Examples here may be changed to match measurement requirements.
6. ARM command does not set DONE (bit 7) in VXI Status Register 04
until measurement is complete. Wait for INITIATED (bit 13) in
Scan Status Register 10
Reg Offset (hex)
06
04
Reg Offset (hex)
04
04
04
Loop reading VXI Status Reg 04 until bits 3 and 2 set (Passed and Ready)
04
.
16
, 0E
) must be written before the Command
16
16
before issuing any triggers.
16
Value (hex)
2000
note 1
FFFC
Value (hex)
8002
8003
8002
8000
Appendix D

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