Fifo Status Register Base + 24 - HP E1313A Manual

High speed a/d module
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FIFO Status Register
Address
Base + 24
352
Register-Based Programming
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Read only: The FIFO Status Register indicates when the FIFO is not
empty, and when a block of 32,768 readings is in the FIFO.
15 - 11
10 - 9
all 0s
Count Width
16
(16 bits = 102)
Count Width: These bits indicate the width of the FIFO Reading Count
Register. The count width is 16-bits.
Bit 10
Bit 9
0
0
0
1
1
0
1
1
Data Width: These bits indicate the data width of the FIFO registers. The
data width is 32-bits.
Bit 8
Bit 7
0
0
0
1
1
0
1
1
Block Size: These bits indicate the number of readings that may be read
from the FIFO registers whenever the Block Ready bit is set. The number
of readings is encoded in binary such that Number_of_readings = 2
n is the value encoded in the Block Size field. For the HP E1413, n is equal
to 15, which makes the block size 32,768 readings.
Block Ready: A one (1) indicates that there is a block of data available to
be read from the FIFO registers. The number of readings that can be read is
encoded in the Block Size field. A zero (0) indicates that less than a full
block of readings is available.
FIFO Ready: A one (1) indicates that there is at least one reading in the
FIFO. A zero (0) indicates that there is no valid data in the FIFO.
8 - 7
6 - 2
Data Width
Block Size
(32 bits = 11
(32,768 = 01111
2)
Meaning
No Count Register
8-bits
16-bits
32-bits
Meaning
Reserved
8-bits
16-bits
32-bits
Base + 24
1
0
Block Ready
FIFO Ready
)
2
n
, where
Appendix D
16

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