Accessing Mddr From Fpga Fabric Through The Ahb Interface; Figure 27 Smartdesign Connections (Top Level View) - Microchip Technology Microsemi SmartFusion2 User Manual

Fpga high speed ddr interfaces
Table of Contents

Advertisement

MDDR Subsystem
Figure 27 • SmartDesign Connections (Top Level View)
For MDDR AXI throughput, see
Efficiency - Libero v11.7 Application
3.6.3

Accessing MDDR from FPGA Fabric Through the AHB Interface

The MDDR subsystem can be used to access the DDR memory using the AHB-Lite interface. The
following illustration shows the MDDR with AHB-Lite interface.
AC422: SmartFusion2 - Optimizing DDR Controller for Improved
Note.
Microsemi Proprietary UG0446 User Guide Revision 7.0
48

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the Microsemi SmartFusion2 and is the answer not in the manual?

Questions and answers

This manual is also suitable for:

Microsemi igloo2

Table of Contents