How To Use Smc_Fic In Igloo2 Device; Figure 140 Hpms External Memory Configurator - Microchip Technology Microsemi SmartFusion2 User Manual

Fpga high speed ddr interfaces
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Soft Memory Controller Fabric Interface Controller
Table 167 • SMC_FIC 32-bit AHB-Lite Port List (continued)
Signal
MDDR_SMC_AHB_M_HSIZE[1:0]
MDDR_SMC_AHB_M_HWDATA[31:0] Output
MDDR_SMC_AHB_M_HADDR[31:0]
MDDR_SMC_AHB_M_HRDATA[31:0] Input
6.2

How to Use SMC_FIC in IGLOO2 Device

This section describes how to use SMC_FIC for accessing external SDR memory. The SMC_FIC can be
enabled and configured using the System Builder in the Libero SoC design software. The System Builder
uses the CoreSDR_AXI and connects to SMC_FIC interface. The CoreSDR_AXI IP is an AXI based
SDR memory controller.The steps provided below are required to access the external SDR memory from
CoreSDR_AXI.
1.
Select the HPMS External Memory, Soft Memory Controller (SMC) and HPDMA in the System
Builder - Device Features window as shown in the following image.
For details on how to launch the System Builder wizard and a detailed information on how to use it, refer
the
IGLOO2 System Builder User
Figure 140 • HPMS External Memory Configurator
For more information on how to use SMC_FIC in SmartFusion2 Device, refer to
SMC_FIC in SmartFusion2 Devices"
2.
Click Next to get the Peripherals window. Click configure under HPMS SMC_FIC subsystem as
shown in the following image.
Direction Polarity Description
Output
Output
Guide.
.
Microsemi Proprietary UG0446 User Guide Revision 7.0
Indicates the size of the transfer.
00: Byte
01: Half word
10: Word
The write data bus is used to transfer data during write
operations.
Indicates address bus.
The read data bus is used to transfer data from bus
slaves to the bus master during read operations.
"Appendix A: How to Use
225

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