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Microchip Technology ay-3-8910 Data Manual
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Microchip Technology ay-3-8910 Data Manual

Microchip Technology ay-3-8910 Data Manual

Programmable sound generator
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30-OCT-1999
This is the General Instruments AY-3-8910 / 8912
Programmable Sound Generator (PSG) data Manual.
This was scanned and converted using adobe capture
and adobe acrobat to convert it into a .pdf.
Keep in mind that the OCR function is not perfect
and you should be careful of typos and other errors
introduced by the conversion process.
Untitled
Page 1

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Summary of Contents for Microchip Technology ay-3-8910

  • Page 1 Untitled 30-OCT-1999 This is the General Instruments AY-3-8910 / 8912 Programmable Sound Generator (PSG) data Manual. This was scanned and converted using adobe capture and adobe acrobat to convert it into a .pdf. Keep in mind that the OCR function is not perfect and you should be careful of typos and other errors introduced by the conversion process.
  • Page 2 A Y - 3 - 8 9 1 0 / 8 9 1 2 PROGRAMMABLE SOUND GENERATOR DATA MANUAL...
  • Page 3 Portions of this book have been reprinted with permission from the original General Instrument Ay-3-8910/8912 DATA MANUAL. Neither General Instruments nor this company assume responsibility for the accuracy or use of any of the information...
  • Page 4 Since most applications of a microprocessor/PSG system would also require interfacing between the outside world and the microproces- sor, this facility has been designed into the PSG. The AY-3-8910 has two general purpose 8-bit I/O ports and is supplied in a 40 lead...
  • Page 5 > Interfaces to most 8-bit and 16-bit microprocessors. Features q Three independently programmed analog outputs. > Two 8-bit general purpose I/O ports (AY-3-8910). > One 8-bit general purpose I/O port (AY-3-8912). > Single +5 Volt Supply. This Data Manual is intended to introduce the techniques needed to...
  • Page 6 2 ARCHITECTURE The AY-3-8910/8912 is a register oriented Programmable Sound Generator (PSG). Communication between the processor and the PSG is based on the concept of memory-mapped I/O. Control commands are issued to the PSG by writing to 16 memory-mapped registers. Each of the 16 registers within the PSG is also readable so that the microprocessor can determine, as necessary, present states or stored data values.
  • Page 9 I/O Ports without affecting any other function of the PSG. The I/O Ports are TTL-compatible and are provided with internal pull-ups on each pin. Both Ports are available on the AY-3-8910; only I/O Port A is available on the AY-3-8912.
  • Page 11 2 . 2 The AY-3-8910 is supplied in a 40 lead dual in-line package with the pm assignments as shown in Fig. 4. The AY-3-8912 is supplied in a28 P I N A s s i g n m e n t s lead dual in-line package with the pin assignments as shown in Fig.
  • Page 12 2 . 3 DA7--DA0 (input/output/high impedance): pins30--37 (AY-3-8910) pins 21--28 (AY-3-8912) Functions Data/Address 7-0: pplied in a 28 own in Fig. 5. These 8 lines comprise the 8-bit bidirectional bus used by the microprocessor to send both data and addresses to the PSG and to receive data from the PSG.
  • Page 13 Each of these signals is the output of its corresponding D/A Converter, and provides an up to 1V peak-peak signal representing the complex sound waveshape generated by the PSG. IOA7--IOAO (input/output): pins 14--21 (AY-3-8910) pins 7--14 (AY-3-8912) IOB7--1OB0 (input/output): pins 6--13 (AY-3-8910)
  • Page 14 TEST 1: pin 39 (AY-3-8910) pin 2 (AY-3-8912) TEST 2: pin 26 (AY-3-8910) (not connected on AY-3-8912) These pins are for GI test purposes only and should be left open-& not use as tie-points. Vcc: pin 40 (AY-3-8910) pin 3 (AY-3-8912) Nominal +5Volt power supply to the PSG.
  • Page 15 2.5 While the state flow for many microprocessors can be somewhat involved for certain operations, the sequence of events necessary to State Timing control the PSG is simple and straightforward. Each of the three major state sequences (Latch Address, Write to PSG, and Read from PSG) consists of several operations (indicated below by rectangular blocks), defined by the pattern of bus control signals (BDIR, BC2, BCl).
  • Page 16 2.5.2 WRITE DATA TO PSG SEQUENCE The “Write to PSG” sequence, which would normally follow immedi- ately after an address sequence, requires four principal microstates: (1) send NACT (inactive); (2) put data on bus; (3) send DWS (write to PSG); (4) send NACT (inactive). 2.5.3 READ DATA FROM PSG SEQUENCE As with the “Write to PSG”...

  • Page 17: Operation

    3 OPERATION Since all functions of the PSG are controlled by the host processor via a series of register loads, a detailed description of the PSG operation can best be accomplished by relating each PSG function to the control of its corresponding register. The function of creating or programming a specific sound or sound effect logically follows the control sequence listed: Registers...
  • Page 18 The equations describing the relationship between the desired output tone frequency and the input clock frequency and Tone Period value are:...

  • Page 19: Noise Generator

    The frequency of the noise source is obtained in the PSG by first counting down the input clock by 16, then by further counting down Noise Generator the result by the programmed 5-bit Noise Period value. This B-bit value consists of the lower 5 bits (B4-B0) of register R6, as CONTROL illustrated in the following: (Register...
  • Page 20 3.3 Register 7, is a multi-function Enable register which controls the three Noise/Tone Mixers and the two general purpose I/O Ports. Mixer Control- The Mixers, as previously described, combine the noise and tone I/O Enable frequencies for each of the three channels. The determination of combining neither/either/both noise and tone frequencies on each (Register R7) channel is made by the state of bits B5--B0 of R7.
  • Page 21 3.4 The amplitudes of the signals generated by each of the three D/A Converters (one each for Channels A, B, and C) is determined by the Amplitude contents of the lower 5 bits (B4--BO) of registers R10, Rl11, and R12 as illustrated in the following: c o n t r o l Amplitude Control...
  • Page 22 The full chart describing all combinations of the 5-bit Amplitude Control is as follows: Amplitude Control Channel Register # Fig. 6 graphically illustrates a selection of variable level (envelope- controlled) amplitude where the 16 levels directly reflect the output of the Envelope Generator. A fixed level amplitude would correspond to only one of the levels shown, with the level directly determined by the decimal equivalent of bits L3 L2 L1 L0.
  • Page 23 3 . 5 To accomplish the generation of fairly complex envelope patterns, Envelope two independent methods of control are provided in the PSG: first, it is possible to vary the frequency of the envelope using registers R13 Generator and R14; and second, the relative shape and cycle pattern of the envelope can be varied using register R15.
  • Page 24 To calculate the values for the contents of the Envelope Period Coarse and Fine Tune registers, given the input clock and the desired envelope frequencies, we rearrange the above equations, yielding: 3.5.2 ENVELOPE SHAPE/CYCLE CONTROL R15) (Register The Envelope Generator further counts down the envelope fre- quency by 16, producing a 16-state per cycle envelope pattern as defined by its 4-bit counter output, E3 E2 El E0.
  • Page 25 Attack when set to logic “1": the envelope counter will count up (attack) from E3 E2 E1 E0=0000 to E3 E2 E1 E0=1111; Envelope when set to logic “0”, the envelope counter will count Generator down (decay) from 1111 to 0000. Continue when set to logic “1”, the cycle pattern will be as defined Control...
  • Page 27 I/O Port Data ports (IOA7-IOA0 and IOB7--1OB0). Both ports are available in the AY-3-8910; only I/O Port A is available in the AY-3-8912. Using Store registers R16 and R17 for the transfer of I/O data has no effect at all on sound generation.

  • Page 28: D/A Converter Operation

    3 . 7 Since the primary use of the PSG is to produce sound for the highly imperfect amplitude detection mechanism of the human ear, the D/A D/A Converter conversion is performed in logarithmic steps with a normalized Operation voltage range of from 0 to 1 Volt. The specific amplitude control of each of the three D/A Converters isaccomplished by the three sets of 4-bit outputs of the Amplitude Control block, while the Mixeroutputs provide the base signal frequency (Noise and/or Tone).
  • Page 29 4 INTERFACING Since the AY-3-8910/8912 PSG must be used with support compo- nents, interfacing to the circuit is an obvious requirement. The PSG is Introduction designed to be controlled by a microprocessor or microcomputer, and drive directly into analog audio circuitry. It provides the link between the computer and a speaker to provide sounds or sound effects derived from digital inputs.
  • Page 30 4 . 2 An economical solution to providing a system clock is shown in Fig. Clock 15. It consists of a 3.579545MHz standard color burst crystal, a CD4089 CMOS inverter, and a CD4013 to divide the color burst Generation frequency in half. The clock produced for the PSG runs at a 1.7897725MHz rate.

  • Page 31: Audio Output Interface

    Fig. 16 illustrates the audio output connections to a commercially available LM386 audio amplifier. It shows channels A, B, and C Audio Output summed together to enable complex waveforms to becomposed and Interface amplified through a single external amplifier. These channels may be individually amplified through separate channels for more exotic sound systems.
  • Page 32 4 . 4 The ROM or PROM shown connected to the PSG in Fig. 17 illustrates an option for providing additional data information for processor External support. The two I/O registers within the PSG are used in this case to Memory address the memory via I/O Port A (8 Bits) and read data from the memory via I/O Port B (8 Bits).
  • Page 33 In Fig. 18, the lines identified DA7--DA0 are the input/output bus bits 7--0. This 8 bit bus is used to pass all data and address information Microprocessor/ between the AY-3-8910/8912 and the system processor. BC1, BC2 and BDIR are bus control signals generated by the Microcomputer processor to direct all bus operations.
  • Page 34 4.6 Fig. 19 shows the schematic of an AY-3-8910 demonstrator circuit. Interfacing This configuration uses a PIC 1650 as the main controller in the circuit. The PIC 1650 is used to scan the keyboard, fetch data from to the PIC 1650...
  • Page 35 4 . 6 Interfacing to the PIC 1650 (Cont.)
  • Page 36 Fig. 19 PIC 1650/AY-3-6910 SYSTEM EXAMPLE...
  • Page 37 4 . 7 As shown in Fig. 20, the wiring is direct between the AY-3-8910 and a CP1600/1610 microprocessor. The levels are compatible thus elimi- Interfacing to the nating any need for level converters. Even the terminology between CP1600/1610 the IC’s remains constant to provide simple-to-follow connections.
  • Page 38 Fig. 20 CP1600/1610/AY-3-8910 INTERFACE...
  • Page 39 4 . 8 An M6800 microprocessor can be interfaced with an AY-3-8910/8912 through the addition of an M6820 PIA chip. The I/O portsdesignated Interfacing as PA0 to PA7 are used as the 8 bit bus lines and I/O ports PB0 to PB2 are used as the bus control lines.
  • Page 40 Fig. 21 M6800/AY-3-8910 INTERFACE...
  • Page 41 The sample S100 bus design provides for reading and writing the PSG using only an 8080 “IN” or “OUT” instruction to the proper Interfacing address. Another feature of the design is the provision for multiple PSG devices to be connected to a single bus. The system described is to the 8080 presently running two PSG’s, one to each of two stereo channels.
  • Page 43 5 MUSIC GENERATION The production of music involves the creation of series of frequen- cies which are pleasing to the human ear (setting critical evaluation aside). This involves essentially mathematical relationships, making the application ideal for digital devices. For example, the shifting up or down in octaves is a multiplication or division by a power of 2, which is a simple shift operation for most microprocessors.

  • Page 45: Octave Shift

    One of the methods of entering a composition into a computer memory would be to utilize a keyboard to pass number and Tune Entry/ alphabetic information concerning the composer’s wishes. An alter- Playback nate method would be to scan a positional series of switches (like a piano keyboard) to determine note, volume and duration data.
  • Page 46 5.3.4 CHORDS There are-certain combinations of notes which when played simul- taneously produce pleasant combinations. These “chords” can be easily formed from a base note by performing octave and key changes on two notes, which are played with the main note. These relationships are illustrated in Fig.
  • Page 47 5.4.1 RELATIVE CHANNEL VOLUME VARIATION The independently programmable amplitude control for each chan- Sound nel allows up to 16 levels if using the processor controlled amplitude mode (bit 4 of registers 10, 11 or 12=0). In the case of a decaying or steady note, when a note is played or “fired”, a frequency may be set up in the coarse and fine tune registers and then an amplitude value placed in the respective register 10, 11 or 12.
  • Page 48 The ROM shown connected to the AY-3-8910 is optional depending on the amount of data necessary for the microcomputer. The system shown here may also consist of multiple AY-3-8910’s all controlled by a single microcomputer. It represents an economical solution to developing voicing control with a minimum of compo- nents.
  • Page 49 The microcomputer used in this case could be a GI PIC 1650 which can be internally programmed to drive a series of AY-3-8910’s all hardwired to an I/O port of the PIC. Each AY-3-8910 provides a separate output envelope and frequency of the instrument it is to synthesize.
  • Page 50 6 SOUND EFFECTS GENERATION One of the main uses of the PSG is to produce non-musical sound effects to accompany visual action or as a feature in itself. The following sections outline techniques and provide actual examples of some popular effects. All examples are based on a 1.78977MHz PSG clock.
  • Page 51 6 . 2 Some of the more commonly required sounds require only the use of noise and the envelope generator (or processor control of channel Noise Only envelope if other channels are using the envelope generator). Effects Examples of this, which can be seen in Figs. 28 and 29, are gunshot and explosion.

  • Page 52: Electrical Specifications

    7 ELECTRICAL SPECIFICATIONS...
  • Page 53 Because of the independent architecture of the PSG, many rather complex effects are possible without burdening the processor. For Multi-Channel example, the Wolf Whistle effect in Fig. 32 shows two channels in use Effects to add constant breath hissing noise to the three concentrated frequency sweeps of the whistle.
  • Page 54 7 ELECTRICAL SPECIFICATIONS...

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Ay-3-8912