Figure 83 Fabric Ddr Memory Configuration; Table 140 Ddr I/O Standard Is Configured Based On I/O Drive Strength Setting - Microchip Technology Microsemi SmartFusion2 User Manual

Fpga high speed ddr interfaces
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Fabric DDR Subsystem
For more information, refer to the
Select the I/O Drive Strength as Half Drive Strength or Full Drive Strength, as shown in the
following table. The DDR I/O standard is configured as listed in the following table based on this
setting.
Table 140 • DDR I/O Standard is Configured based on I/O Drive Strength Setting
I/O Drive Strength
Half Drive Strength
Full Drive Strength
Figure 83 • Fabric DDR Memory Configuration
4.
For only LPDDR memory, the I/O standard and I/O calibration settings are available as shown in
the following image.
Select I/O standard as LVCMOS18 or LPDDRI.
Note: If LVCMOS18 is selected, all IOs are configured to LVCMOS1.8 except CLK/CLK_N.CLK and CLK_N
are configured to LPDDRI standard as they are differential signals.
Select I/O calibration as ON or OFF. If I/O calibration is selected as ON, then the IGLOO2
FDDR_IMP_CALIB pin must be pulled down with a resistor. For resistor values, refer to
Impedance Calibration section in
"Address Mapping"
Memory Type
DDR2
SSTL18I
SSTL18II
DS0124: IGLOO2 Pin Descriptions Datasheet.
Microsemi ProprietaryUG0446 User Guide Revision 7.0
section.
DDR3
SSTL15I
SSTL15II
160

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