Figure 21 Mddr With Axi Interfaces - Microchip Technology Microsemi SmartFusion2 User Manual

MDDR Subsystem
Figure 21 • MDDR with AXI Interfaces
D
D
DDR R
SDRAM
I
O
IGLOO2
Read, write, and read-modify-write transactions are initiated by the AXI master to read from or write the
data to the DDR memory after initializing the MDDR registers.
The following steps describe how to access the MDDR from AXI master in the FPGA fabric:
D
D
AXI
R
Transaction
P
Controller
DDR
H
Controller
Y
APB Config
Reg
Master
AXI
Slave 1
Slave n
Microsemi Proprietary UG0446 User Guide Revision 7.0
MDDR
HPMS DDR
Bridge
DDR_FIC
FIC_0
AHB
CoreConfigMaster
HPMS
HPDMA
eNVM
AHB Bus Matrix
FIC_1 APB_2
CoreConfigP
Fabric
44