Microchip Technology Microsemi SmartFusion2 User Manual page 15

Overview
Table 1 • Additional Documents (continued)
Document
UG0447: IGLOO2 and SmartFusion2 High Speed
Serial Interfaces User Guide
UG0449: SmartFusion2 and IGLOO2 Clocking
Resources User Guide
UG0444: SmartFusion2 and IGLOO2 Low Power
Design User Guide
UG0443: SmartFusion2 and IGLOO2 FPGA
Security and Reliability User Guide
UG0450: SmartFusion2 SoC and IGLOO2 FPGA
System Controller User Guide
UG0450: SmartFusion2 SoC and IGLOO2 FPGA
System Controller User Guide
Libero SoC User Guide
Description
SmartFusion2 and IGLOO2 devices integrate hard high-speed
serial interfaces (PCIe, XAUI/XGXS, SERDES). This document
describes the SmartFusion2 and IGLOO2SmartFusion2 and
IGLOO2 high-speed serial interfaces.
SmartFusion2 and IGLOO2 clocking resources include on-chip
oscillators, FPGA fabric global network, and clock conditioning
circuitry (CCCs) with dedicated phase-locked loops (PLLs).
These clocking resources provide flexible clocking schemes to
the on-chip hard IP blocks—HPMS, fabric DDR (FDDR)
subsystem, and high-speed serial interfaces (PCIe, XAUI/XGXS,
SERDES)—and logic implemented in the FPGA fabric.
In addition to low static power consumption during normal
operation, the SmartFusion2 and IGLOO2 devices support an
ultra-low-power Static mode (Flash*Freeze mode) with power
consumption less than 1 mW. Flash*Freeze mode retains all the
SRAM and register data which enables fast recovery to Active
mode. This document describes the SmartFusion2 and IGLOO2
Flash*Freeze mode entry and exit mechanisms.
The SmartFusion2 and IGLOO2 devices incorporate essentially
all the security features that made third generation Microsemi
SoC devices the gold standard for security in the PLD industry.
Also included are unique design and data security features and
use models new to the PLD industry. SmartFusion2 and IGLOO2
flash-based FPGA fabric has zero FIT configuration rate due to
its single event upset (SEU) immunity, which is critical in reliability
applications. This document describes the SmartFusion2 and
IGLOO2 security features and error detection and correction
(EDAC) capabilities.
The system controller manages programming of the
SmartFusion2 and IGLOO2 devices and handles system service
requests. The subsystems, interfaces, and system services in the
system controller are discussed in this user guide.
Describes different programming modes supported in the
SmartFusion2 and IGLOO2 devices. High level schematics of
these programming methods are also provided as a reference.
Important board-level considerations are discussed.
Libero
powerful FPGA design and development software available,
providing start-to-finish design flow guidance and support for
novice and experienced users alike. Libero SoC combines
Microsemi SoC Products Group tools with such EDA
powerhouses as Synplify and ModelSim. This user guide
discusses the usage of the software and design flow.
Microsemi Proprietary UG0446 User Guide Revision 7.0
®
System-on-Chip (SoC) is the most comprehensive and
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