Table 17 Ddr Memory Regions; Table 18 Accessed Ddr Memory Regions (Based On Mode Settings For 4 Gb Memory) - Microchip Technology Microsemi SmartFusion2 User Manual

MDDR Subsystem
of DDR that is, the accessible DDR memory from AHB bus matrix is 0x00000000-0x4FFFFFFF which is
1 GB.
Table 17 • DDR Memory Regions
DDR Memory Region DDR Memory Space
0 0×00000000-0×0FFFFFFF
1 0×10000000-0×1FFFFFFF
2 0×20000000-0×2FFFFFFF
3 0×30000000-0×3FFFFFFF
4 0×40000000-0×4FFFFFFF
5 0×50000000-0×5FFFFFFF
6 0×60000000-0×6FFFFFFF
7 0×70000000-0×7FFFFFFF
8 0×80000000-0×8FFFFFFF
9 0×90000000-0×9FFFFFFF
10 0×A0000000-0×AFFFFFFF
11 0×B0000000-0×BFFFFFFF
12 0×C0000000-0×CFFFFFFF
13 0×D0000000-0×DFFFFFFF
14 0×E0000000-0×EFFFFFFF
15 0×F0000000-0×FFFFFFFF
Table 18 • Accessed DDR Memory Regions (Based on Mode Settings for 4 GB Memory)
DDR Memory Regions Visible at MSS/HPMS DDR Address Space for Different Modes
MSS/HPMS DDR
Space 0
Address Space (0×A0000000-
Mapping Modes 0×AFFFFFFF)
0000 Region 10
0001 Region 0
0010 Region 0
0011 Region 4
0100 Region 8
0101 Region 12
0110 Region 0
0111 Region 0
1000 Region 0
1001 Region 0
1010 Region 0
1011 Region 0
1100 Region 0
MSS/HPMS DDR
Space 1
(0×B0000000-
0×BFFFFFFF)
Region 11
Region 1
Region 1
Region 5
Region 9
Region 13
Region 1
Region 1
Region 1
Region 1
Region 1
Region 1
Region 1
Microsemi Proprietary UG0446 User Guide Revision 7.0
MSS/HPMS DDR MSS/HPMS DDR
Space 2 Space 3
(0×C0000000- (0×D0000000-
0×CFFFFFFF) 0×DFFFFFFF)
Region 12 Region 13
Region 2 Region 3
Region 2 Region 3
Region 6 Region 7
Region 10 Region 11
Region 14 Region 15
Region 2 Region 3
Region 4 Region 5
Region 6 Region 7
Region 8 Region 9
Region 10 Region 11
Region 12 Region 13
Region 14 Region 15
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