Figure 120 Fddr Configuration - Microchip Technology Microsemi SmartFusion2 User Manual

Fabric DDR Subsystem
Figure 120 • FDDR Configuration
7. Depending on the application requirement select the memory settings. For more details refer to 3
and 4 in the
8. Instantiate the clock resources (FCCC and chip oscillators) in the SmartDesign canvas and
configure, as required. In this example, the fabric CCC is configured to generate 111 MHz, as shown
in the following image.
"Design Flow Using System
Microsemi ProprietaryUG0446 User Guide Revision 7.0
Builder".
201