Figure 121 Fabric Ccc Configuration; Figure 122 Coreconfigp Ip Configuration - Microchip Technology Microsemi SmartFusion2 User Manual

Fpga high speed ddr interfaces
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Fabric DDR Subsystem
Figure 121 • Fabric CCC Configuration
9.
Instantiate CoreConfigP in the SmartDesign canvas and configure for FDDR, as shown in the
following image. Make the FIC_2 and FDDR APB interface connections to CoreConfigP.
Figure 122 • CoreConfigP IP Configuration
10. Instantiate CoreResetP in the SmartDesign canvas and configure for FDDR, as shown in the
following image. Make the connections to CoreResetP and CoreConfigP accordingly.
Microsemi ProprietaryUG0446 User Guide Revision 7.0
202

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