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MDDR Subsystem
Figure 68 • MDDR with Single AHB Interface
DDR
DDR
SDRAM
I/O
To use a dual rather than single AHB interface to the MDDR, set the CFG_NUM_AHB_MASTERS bit in
the
"DDR_FIC_NUM_AHB_MASTERS_CR"
MDDR
AXI
DDR
Transaction
PHY
Controller
Controller
MSS
AHB-Lite
Slave 1
FPGA Fabric
Microsemi Proprietary UG0446 User Guide Revision 7.0
MSS DDR
Bridge
DDR_FIC
Master
Slave n
register to 1.
MSS
AHB
Masters
129
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