Figure 16 Memory Timing Configuration - Microchip Technology Microsemi SmartFusion2 User Manual

MDDR Subsystem
Figure 16 • Memory Timing Configuration
The configurator also provides the option to import and export the register configurations. The
configuration settings are stored in eNVM. Configuration files for accessing LPDDR memory on IGLOO2
evaluation kit can be downloaded from:
www.microsemi.com/soc/documents/LPDDR_Emcraft_Config.zip.
The following is an example of MDDR register configurations for operating the LPDDR memory
(MT46H64M16LF) with clock 166 MHz.
• Device Memory Settling Time (µs): 200
The DDR memories require settling time for the memory to initialize before accessing it. The LPDDR
memory model MT46H64M16LF needs 200 µs settling time.
• General
• Memory Type: LPDDR
• Data Width: 16
• Memory Initialization
• Burst length: 8
• Burst Order: Interleaved
• Timing Mode: 1T
• CAS Latency: 3
• Self Refresh Enabled: No
• Auto Refresh Burst Count: 8
• PowerDown Enabled: Yes
• Stop the clock: No
Microsemi Proprietary UG0446 User Guide Revision 7.0 40