MDDR Subsystem
2.
Navigate to the Memories tab. Depending on the application requirement, select the memory
settings under the General tab, as shown in the following image.
•
Memory Type can be selected as DDR2, DDR3, or LPDDR.
•
The Data width can be selected as 32-bit, 16-bit, or 8-bit. Refer to
supported data widths for various SmartFusion2 device packages.
•
The SECDED (ECC) can be enabled or disabled.
•
Arbitration Scheme can be selected between Type-0 to Type-3. Refer Table 1-10 for details of
arbitration Scheme.
•
The Highest priority ID of fabric master can be entered from 0 to 15, if the Arbitration Scheme
selected other than Type-0.
•
Address Mapping - The register settings to perform mapping to system address bits for various
Row, Bank, and Column combinations are automatically computed by the configurator using
address mapping option.
Column. For more information refer to the
•
Select the I/O Drive Strength as Half Drive Strength or Full Drive Strength as shown in
Figure 48,
on this setting.
Table 124 • DDR I/O Standard Configured Based on I/O Drive Strength Setting
I/O Drive Strength
Half Drive Strength
Full Drive Strength
Figure 48 • I/O Drive Strength Setting
Table 21,
page 114. The DDR I/O standard is configured as listed in
Memory Type
DDR2
SSTL18I
SSTL18II
Microsemi Proprietary UG0446 User Guide Revision 7.0
page 35 shows the supported range for Row, Bank and
"Address Mapping"
DDR3
SSTL15I
SSTL15II
Table 12 on page 25
for
section.
Figure 22,
page 35 based
114
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