Figure 103 Fabric Ddr Memory Settings; Figure 104 Selecting I/O Standard As Lvcmos18 Or Lpddri - Microchip Technology Microsemi SmartFusion2 User Manual

Fpga high speed ddr interfaces
Table of Contents

Advertisement

Fabric DDR Subsystem
Figure 103 • Fabric DDR Memory Settings
3.
For only LPDDR memory, the I/O standard and I/O calibration settings are available as shown in
Figure 84 on page
Select I/O standard as LVCMOS18 or LPDDRI.
Note: If LVCMOS18 is selected, all IOs are configured to LVCMOS1.8 except CLK/CLK_N.CLK and CLK_N
are configured to LPDDRI standard as they are differential signals.
Select I/O calibration as ON or OFF. If I/O calibration is selected as ON, then the Smartfusion2
FDDR_IMP_CALIB pin must be pulled down with a resistor. For resistor values refer to
Impedance Calibration section in
Figure 104 • Selecting I/O Standard as LVCMOS18 or LPDDRI
161.
DS0115: SmartFusion2 Pin Descriptions Datasheet.
Microsemi ProprietaryUG0446 User Guide Revision 7.0
187

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the Microsemi SmartFusion2 and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

This manual is also suitable for:

Microsemi igloo2

Table of Contents