High-Speed Data Transactions From Hpdma; Figure 132 Configuring Hpms Ddr Bridge For Hpdma; Figure 133 Configuring Hpms Ddr Bridge For Non-Bufferable Region - Microchip Technology Microsemi SmartFusion2 User Manual

DDR Bridge
read/write buffers. The DDR bridge configurator allows to select the size of read/write buffers as 32 bytes or 16
bytes.
Figure 132 • Configuring HPMS DDR Bridge for HPDMA
5.2.1.2 Configurations for the DDR Bridge in the MDDR or FDDR Subsystems
The DDR bridge in the MDDR or FDDR subsystem can be configured using the DDR_FIC registers listed
in Table 165 on page
• Enable or disable the write and read buffers of the DDR bridge using the
DDR_FIC_HPD_SW_RW_EN_CR register
• Configure buffer size to 32 bytes or 16 bytes using the DDR_FIC_NBRWB_SIZE_CR register
• Configure the non-bufferable address using the DDR_FIC_NB_ADD register
• Configure the non-bufferable size using the DDR_FIC_NBRWB_SIZE_CR register
• Configure the timeout value for each write buffer using the DDR_FIC_LOCK_TIMEOUTVAL_1_CR
and DDR_FIC_LOCK_TIMEOUTVAL_2_CR registers.
Set the timeout value to maximum or a non- zero value.
The configuration registers for the MDDR bridge and FDDR bridge are also listed under the
Configuration Registers Summary" section on page 103
5.2.2

High-Speed Data Transactions from HPDMA

This section describes the use of the DDR bridge to increase the throughput from the HPDMA to the
external DDR memories. The HPDMA performs only the single read and write transactions and not the
burst transactions. The DDR bridge converts these single transactions into burst transactions and further
increases the throughput. The HPDMA buffers are enabled for this, and the non-bufferable size is
selected as None, as shown in the following image.
Figure 133 • Configuring HPMS DDR Bridge For Non-Bufferable Region
216. The possible configurations and corresponding registers ares:
Microsemi Proprietary UG0446 User Guide Revision 7.0
section in the MDDR and FDDR chapters.
"DDR_FIC
214