Nene - Intel 82496 CACHE CONTROLLER User Manual

Volume 2: 82496 cache controller and 82491 cache sram data book
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PINOUTS
Table 1-16. Pentium™ Processor CPU-Cache Chip Set Output Pins (Contd.)
Active
Synchronous I
Pin Name
Component
Level
Asynchronous
When Floated
NA#
82496 Cache Controller
low
Synchronous to ClK
-
NENE#
82496 Cache Controller
low
Synchronous to ClK
-
PAllC#
82496 Cache Controller
low
Synchronous to ClK
-
PCO
Pentium processor
High
Synchronous to ClK
Bus Hold, BOFF#
PCHK#
Pentium processor
low
Synchronous to ClK
-
PROY
Pentium processor
High
Synchronous to ClK
-
PWT
Pentium processor
High
Synchronous to ClK
Bus Hold, BOFF#
RDYSRC
82496 Cache Controller
-
Synchronous to ClK
SCYC
Pentium processor
High
Synchronous to ClK
Bus Hold, BOFF#
SMIACT#
Pentium processor
low
Asynchronous
-
SMlN#
82496 Cache Controller
low
Synchronous to ClK
-
SNPADS#
82496 Cache Controller
low
Synchronous to ClK
-
SNPBSY#
82496 Cache Controller
low
Synchronous to ClK
-
SNPCYC#
82496 Cache Controller
low
Synchronous to ClK
-
TOO
Pentium processor, 82496
-
Synchronous to TCK
All states except Shift-
Cache Controller,
82491
DR and Shift IR
Cache SRAM
W/R#
Pentium processor
-
Synchronous to ClK
Bus Hold, BOFF#
WAY
82496 Cache Controller
-
Synchronous to ClK
-
WBIWT#
82496 Cache Controller
-
Synchronous to ClK
-
WBA[SEC2#]
82496 Cache Controller
-
Synchronous to ClK
-
WBTYP [lRO]
82496 Cache Controller
-
Synchronous to ClK
-
WBWE# [lR1]
82496 Cache Controller
low
Synchronous to ClK
-
WRARR#
82496 Cache Controller
low
Synchronous to ClK
-
1-42
I

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