Clk - Intel 82496 CACHE CONTROLLER User Manual

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ntel
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HARDWARE INTERFACE
5.2.2.35.
elK
ClK Pentium processor CPU-Cache Chip Set Clock
CPU clock inputs.
Input to Pentium processor (pin K18), 82496 Cache Controller (pin E12), and
82491 Cache SRAM (pin 30)
Signal Description
The CLK input determines the execution rate and timing of the Pentium processor CPU-Cache
Chip Set. Pin timings are specified relative to the rising edge of this signal. The CLK input
requires TTL levels for proper operation.
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