Intel 82496 CACHE CONTROLLER User Manual page 287

HARDWARE INTERFACE
In strobed mode, the falling edge of MSEL# causes MZBT# to be sampled. While MSEL# is
active, MISTB and MOSTB cause the memory burst counter to be incremented. The rising
edge of MSEL# causes the memory burst counter to be RESET.
MSEL# must be inactive for 1 eLK sometime after RESET (before the first transfer) to
initialize the burst counter.
Relation to Other Signals
Pin Symbol
Relation to Other Signals
MSRDY# MSEL# qualifies the use of MSRDY#. Since MSEL# acts as a qualifier for this
signal, it may be asserted with MSRDY#.
MISTS MSEL# qualifies the use of MISTS. Since MSEL# acts as a qualifier for this signal,
it may be asserted with MISTS.
MOSTS MSEL# qualifies the use of MOSTS. Since MSEL# acts as a qualifier for this
signal, it may be asserted with MOSTS.
MZST# MSEL# causes MZST# to be sampled.
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