Intel 82496 CACHE CONTROLLER User Manual page 375

Volume 2: 82496 cache controller and 82491 cache sram data book
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ELECTRICAL SPECIFICATIONS
65% Vee
50% Vee
35% Vee
~s
~
______
~
________________________________________
~
Time
CDB10
Figure 7-1. Determination of Flight Time
Figure 7-1 shows detennination of flight time based on the 50% V cc level measurement of a 0
pF load output with reference to the 50% Vcc level of at the receiver pin. The 50% Vcc to 65%
V cc rise time is faster than 1 volt/nsee in this example.
7-6
I

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