Reference Manual
REGISTER DETAILS: ADC CIRCUIT
Table 74. Bit Descriptions for BUFSENCON (Continued)
Bits
Bit Name
5
V1P1LPADCEN
4
V1P1HPADCEN
3
V1P8HPADCCHGDIS
2
V1P8LPADCEN
1
V1P8HPADCILIMITEN
0
V1P8HPADCEN
NUMBER OF REPEAT ADC CONVERSIONS REGISTER
Address: 0x400C21F0, Reset: 0x00000160, Name: REPEATADCCNV
Table 75. Bit Descriptions for REPEATADCCNV
Bits
Bit Name
Settings
[31:5]
Reserved
[4]
NUM
[3:1]
Reserved
0
EN
BUFFER CONFIGURATION REGISTER
Address: 0x400C238C, Reset: 0x005F3D00, Name: ADCBUFCON
The recommended value for this register is 0x005F3D0F in high-power mode and 0x005F3D04 in low-power mode.
Table 76. Bit Descriptions for ADCBUFCON
Bits
Bit Name
[31:4]
Reserved
3
CHOPDIS
analog.com
Settings
Description
1 Close Switch. Close this switch to connect the 1.1 V reference to the discharging circuit.
ADC 1.1 V Low-Power Common-Mode Buffer. Optional. Use either high-power or low-power
reference buffer.
0 Disable ADC 1.1 V low-power reference buffer.
1 Enable ADC 1.1 V low-power reference buffer.
Enable 1.1 V High-Power Common-Mode Buffer. Controls buffer for 1.1 V. Common-mode
voltage source to ADC input stage.
0 Disable 1.1 V high-power common-mode buffer.
1 Enable 1.1 V high-power common-mode buffer. Recommended value for normal ADC
operation.
Controls Decoupling Capacitor Discharge Switch. This switch connects the 1.8 V internal
ADC reference to an internal discharging circuit. Ensure that the switch is open for normal
operation to maintain the reference voltage on the external decoupling capacitor.
0 Open switch. If opened, the voltage on the external decoupling capacitor for the reference is
maintained. Recommended setting.
1 Close Switch. Close this switch to connect the reference to the discharge circuit.
ADC 1.8 V Low-Power Reference Buffer.
0 Disable low-power 1.8 V reference buffer.
1 Enable low-power 1.8 V reference buffer. Recommended value. Speeds up settling time
when exiting power-down states.
High-Power ADC Input Current Limit. Protects ADC input buffer.
0 Disable buffer current limit.
1 Enable buffer current limit. Recommended setting.
High-Power 1.8 V Reference Buffer. Enable for normal ADC conversions.
0 Disable 1.8 V high-power ADC reference buffer.
1 Enable 1.8 V high-power ADC reference buffer.
Description
Reserved.
Write 1 to this bit to enable single or continuous conversion.
Reserved.
Enable Repeat ADC Conversions.
0 Disable repeat ADC conversions.
1 Enable repeat ADC conversions.
Settings
Description
Reserved.
Configure Offset Cancellation Buffer Chop.
0 Enable chop.
ADuCM356
Reset
Access
0x1
R/W
0x1
R/W
0x0
R/W
0x1
R/W
0x1
R/W
0x1
R/W
Reset
Access
0x00016
R
0x0
R
0x0
R
0x0
R/W
Reset
Access
0x0
R
0x0
R/W
Rev. A | 70 of 312
Need help?
Do you have a question about the ADuCM356 and is the answer not in the manual?