Register Details: I 2 C; Initiator Control Register; Initiator Status Register - Analog Devices ADuCM356 Reference Manual

Reference Manual
REGISTER DETAILS: I

INITIATOR CONTROL REGISTER

Address: 0x40003000, Reset: 0x0000, Name: MCTL
Table 283. Bit Descriptions for MCTL
Bits Bit Name Settings
[15:12] Reserved
11 MTXDMA
10 MRXDMA
9 Reserved
8 IENCMP
7 IENACK
6 IENALOST
5 IENMTX
4 IENMRX
3 Reserved
2 LOOPBACK
1 COMPETE
0 MASEN

INITIATOR STATUS REGISTER

Address: 0x40003004, Reset: 0x6000, Name: MSTAT
Table 284. Bit Descriptions for MSTAT
Bits Bit Name Settings
15 Reserved
14 SCLFILT
13 SDAFILT
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2
C
Description
Reserved.
Enable Initiator Transmit DMA Request.
0 Disable DMA mode.
2
1 Enable I C initiator DMA transmit requests.
Enable Initiator Receive DMA Request.
0 Disable DMA mode.
2
1 Enable I C initiator DMA receive requests.
Reserved.
Transaction Completed (or Stop Detected) Interrupt Enable.
0 Interrupt is not generated when a stop is detected.
1 Interrupt is generated when a stop is detected.
Acknowledge Not Received Interrupt Enable.
0 Acknowledge not received interrupt disable.
1 Acknowledge not received interrupt enable.
Arbitration Lost Interrupt Enable.
0 Arbitration lost interrupt disable.
1 Arbitration lost interrupt enable.
Transmit Request Interrupt Enable.
0 Transmit request interrupt disable.
1 Transmit request interrupt enable.
Receive Request Interrupt Enable.
0 Receive request interrupt disable.
1 Receive request interrupt enable.
Reserved. Write 0 to this bit.
Internal Loopback Enable. It is also possible for the initiator to loop back a transfer to the target as long
as the device address corresponds, otherwise known as external loopback.
0 I2C_SCL and I2C_SDA out of the device are not muxed onto their corresponding inputs.
1 I2C_SCL and I2C_SDA out of the device are muxed onto their corresponding inputs.
Start Back Off Disable. Setting this bit enables the device to compete for ownership even if another
device is currently driving a start condition.
Initiator Enable. The initiator must be disabled to gate the clock to the initiator when not in use and save
power. Do not clear until a transaction has completed (see MSTAT, Bit 8).
0 Initiator is disabled.
1 Initiator is enabled.
Description
Reserved.
State of I2C_SCL Line. This bit is the output of the glitch filter on I2C_SCL. I2C_SCL is always pulled high
when undriven.
State of I2C_SDA Line. This bit is the output of the glitch filter on I2C_SDA. I2C_SDA is always pulled
high when undriven.
ADuCM356
Reset Access
0x0 R
0x0 W
0x0 W
0x0 R/W
0x0 R/W
0x0 R/W
0x0 R/W
0x0 R/W
0x0 R/W
0x0 R/W
0x0 R/W
0x0 R/W
0x0 R/W
Reset Access
0x0 R
0x1 R
0x1 R
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