Initialization Status Register - Analog Devices ADuCM356 Reference Manual

Reference Manual
REGISTER DETAILS: POWER MANAGEMENT UNIT
Table 29. Bit Descriptions for SRAM_CTL (Continued)
Bits Bit Name Settings
16 PENBNK0
15 ABTINIT
14 AUTOINIT
13 STARTINIT
[12:6] RESERVED
5 BNK5EN
4 BNK4EN
3 BNK3EN
2 BNK2EN
1 BNK1EN
0 BNK0EN

INITIALIZATION STATUS REGISTER

Address: 0x4004C264, Reset: 0x00000001, Name: SRAM_INITSTAT
Table 30. Bit Descriptions for SRAM_INITSTAT
Bits Bit Name
[31:6] Reserved
5 BNK5
4 BNK4
3 BNK3
2 BNK2
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Description
Enable Parity Check for SRAM Bank 0. SRAM Address 0x20000000 to Address 0x20001FFF. Parity is
checked when data is read and when a byte or half word data is written to this SRAM area. If a parity
error is detected, a bus error is generated and the execution vectors to the bus fault interrupt.
0 Disable parity check of this bank of SRAM.
1 Enable parity check of this bank of SRAM.
Abort Current Initialization. Self cleared.
Automatic Initialization on Wake-Up from Hibernate Mode.
Write One to Trigger Initialization. Self cleared.
Reserved.
Enable Initialization of SRAM Bank 5.
0 Disable initialization of this bank of SRAM.
1 Enable initialization of this bank of SRAM.
Enable Initialization of SRAM Bank 4.
0 Disable initialization of this bank of SRAM.
1 Enable initialization of this bank of SRAM.
Enable Initialization of SRAM Bank 3.
0 Disable initialization of this bank of SRAM.
1 Enable initialization of this bank of SRAM.
Enable Initialization of SRAM Bank 2. SRAM Address 0x10000000 to Address 0x10003FFF if
SRAM_CTL, Bit 31 = 1. Address range is 0x20004000 to 0x20007FFF if SRAM_CTL, Bit 31 = 0.
Initialization is necessary on exiting hibernate mode if the SRAM is not retained and parity checking is
enabled.
0 Disable initialization of this bank of SRAM.
1 Enable initialization of this bank of SRAM.
Enable Initialization of SRAM Bank 1. SRAM Address 0x20002000 to Address 0x20003FFF. Initialization
is necessary on exiting hibernate mode if the SRAM is not retained and parity checking is enabled.
0 Disable initialization of this bank of SRAM.
1 Enable initialization of this bank of SRAM.
Enable Initialization of SRAM Bank 0. SRAM Address 0x20000000 to Address 0x20001FFF. Initialization
is necessary on exiting hibernate mode if the SRAM is not retained and parity checking is enabled.
0 Disable initialization of this bank of SRAM.
1 Enable initialization of this bank of SRAM.
Settings Description
Reserved.
Initialization Status of SRAM Bank 5.
0 Not initialized.
1 Initialization completed.
Initialization Status of SRAM Bank 4.
0 Not initialized.
1 Initialization completed.
Initialization Status of SRAM Bank 3.
0 Not initialized.
1 Initialization completed.
Initialization Status of SRAM Bank 2.
ADuCM356
Reset
0x0
0x0
0x0
0x0
0x00
0x0
0x0
0x0
0x0
0x0
0x0
Reset Access
0x0000000 R/W
0x0 R
0x0 R
R
0x0
0x0 R
Rev. A | 31 of 312
Access
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W