Register Details: System Exceptions And Peripheral Interrupts; External Interrupt Configuration 0 Register - Analog Devices ADuCM356 Reference Manual

Reference Manual

REGISTER DETAILS: SYSTEM EXCEPTIONS AND PERIPHERAL INTERRUPTS

EXTERNAL INTERRUPT CONFIGURATION 0 REGISTER

Address: 0x4004C080, Reset: 0x00200000, Name: XINT_CFG0
Table 46. Bit Descriptions for XINT_CFG0
Bits Bit Name
[31:24] Reserved
[23:21] UART_RX_MDE
20 UART_RX_EN
[19:16] Reserved
15 IRQ3EN
[14:12] IRQ3MDE
[11:8] Reserved
7 IRQ1EN
[6:4] IRQ1MDE
[3:0] Reserved
analog.com
Settings Description
Reserved.
External Interrupt Using P0.11/UART_SIN Wake-Up Mode.
000 Rising edge.
001 Falling edge.
010 Rising or falling edge.
011 High level.
100 Low level.
101 Falling edge (same as 001).
110 Rising or falling edge (same as 010).
111 High level (same as 011).
External Interrupt Enable Bit. This bit enables the P0.11/UART_SIN pin to generate an
interrupt on IRQ4. Refer to
1 P0.11/UART_SIN wake-up interrupt is enabled.
0 P0.11/UART_SIN wake-up interrupt is disabled.
Reserved.
External Interrupt 3 Enable Bit.
0 External Interrupt 3 disabled.
1 External Interrupt 3 enabled.
External Interrupt 3 Mode.
000 Rising edge.
001 Falling edge.
010 Rising or falling edge.
011 High level.
100 Low level.
101 Falling edge (same as 001).
110 Rising or falling edge (same as 010).
111 High level (same as 011).
Reserved.
External Interrupt 1 Enable Bit.
0 External Interrupt 1 disabled.
1 External Interrupt 1 enabled.
External Interrupt 1 Mode.
000 Rising edge.
001 Falling edge.
010 Rising or falling edge.
011 High level.
100 Low level.
101 Falling edge (same as 001).
110 Rising or falling edge (same as 010).
111 High level (same as 011).
Reserved.
Table 41.
ADuCM356
Reset Access
0x0 R
0x1 R/W
0x0 R/W
0x0 R/W
0x0 R/W
0x0 R/W
0x0 R/W
0x0 R/W
0x0 R/W
0x0 R/W
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