Nx Switch Matrix Status Register - Analog Devices ADuCM356 Reference Manual

Reference Manual
REGISTER DETAILS: PROGRAMMABLE SWITCHES
Table 150. Bit Descriptions for PSWSTA (Continued)
Bits Bit Name
2 P3STA
1 P2STA
0 PR0STA

NX SWITCH MATRIX STATUS REGISTER

Address: 0x400C21B8, Reset: 0x00000000, Name: NSWSTA
This register gives the status of the Nx switches shown in
Table 151. Bit Descriptions for NSWSTA
Bits Bit Name
[31:12] Reserved
11 NL2STA
10 NLSTA
9 NR1STA
8 N9STA
7 N8STA
6 N7STA
5 N6STA
4 N5STA
3 N4STA
2 N3STA
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Settings Description
0 Switch open.
1 Switch closed.
Status of P3 Switch.
0 Switch open.
1 Switch closed.
Status of P2 Switch.
0 Switch open.
1 Switch closed.
PR0 Switch Control.
0 Switch open.
1 Switch closed.
Figure 27.
Settings Description
Reserved.
Status of NL2 Switch.
0 Switch open.
1 Switch closed.
Status of NL Switch.
0 Switch open.
1 Switch closed.
Status of NR1 Switch.
0 Switch open.
1 Switch closed.
Status of N9 Switch.
0 Switch open.
1 Switch closed.
Status of N8 Switch.
0 Switch open.
1 Switch closed.
Status of N7 Switch.
0 Switch open.
1 Switch closed.
Status of N6 Switch.
0 Switch open.
1 Switch closed.
Status of N5 Switch.
0 Switch open.
1 Switch closed.
Status of N4 Switch.
0 Switch open.
1 Switch closed.
Status of N3 Switch.
ADuCM356
Reset Access
0x0 R
0x0 R
0x0 R
Reset Access
0x0 R
0x0 R
0x0 R
0x0 R
0x0 R
0x0 R
0x0 R
0x0 R
0x0 R
0x0 R
0x0 R
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