Fractional Baud Rate Register; Baud Rate Divider Register; Second Line Control Register - Analog Devices ADuCM356 Reference Manual

Reference Manual
REGISTER DETAILS: UART
Table 330. Bit Descriptions for COMFCR (Continued)
Bits Bit Name Settings
3 FDMAMD
2 TFCLR
1 RFCLR
0 FIFOEN

FRACTIONAL BAUD RATE REGISTER

Address: 0x40005024, Reset: 0x0000, Name: COMFBR
Table 331. Bit Descriptions for COMFBR
Bits Bit Name Settings
15 FBEN
[14:13] Reserved
[12:11] DIVM
[10:0] DIVN

BAUD RATE DIVIDER REGISTER

Address: 0x40005028, Reset: 0x0000, Name: COMDIV
Table 332. Bit Descriptions for COMDIV
Bits Bit Name Settings
[15:0] DIV

SECOND LINE CONTROL REGISTER

Address: 0x4000502C, Reset: 0x0002, Name: COMLCR2
Table 333. Bit Descriptions for COMLCR2
Bits Bit Name
[15:2] Reserved
[1:0] OSR
analog.com
Description
FIFO DMA Mode.
0 Receive DMA request is asserted when there is data in RBR in the COMRX register or the receive FIFO,
and deasserts when RBR or the receive FIFO is empty. A transmit DMA request is asserted when THR in
the COMTX register or the transmit FIFO is empty, and deasserts whenever data is written to the COMTX
register.
1 Receive DMA request is asserted when the receive FIFO trigger level or timeout is reached, and deasserts
when the receive FIFO is empty. The transmit DMA request is asserted when the transmit FIFO is empty
and deasserts when the transmit FIFO is completely full.
Clear Transmit FIFO.
0 No effect.
1 Clear transmit FIFO.
Clear Receive FIFO.
0 No effect.
1 Clear receive FIFO.
FIFO Enabled to Work in 16550 UART Mode.
Description
Fractional Baud Rate Generator Enable. The generating of fractional baud rate and the final baud rate of
UART operation are calculated using the following:
Baud Rate = ((UCLK)/(2 × (M + N/2048)) 16 × COMDIV)
Reserved.
Fractional Baud Rate M Divide Bits, 1 to 3. This bit must not be 0.
Fractional Baud Rate N Divide Bits, 0 to 2047.
Description
Baud Rate Divider. Ensure that the COMDIV register is not 0. The range of allowed DIV values is from 1 to
65,535.
Settings
00 Over sample by 4.
01 Over sample by 8.
10 Over sample by 16.
11 Over sample by 32.
Description
Reserved.
Over Sample Rate.
ADuCM356
Reset Access
0x0 R/W
0x0 W
0x0 W
0x0 R/W
Reset Access
0x0 R/W
0x0 R
0x0 R/W
0x0 R/W
Reset Access
0x1 R/W
Reset Access
0x0 R
0x2 R/W
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