Dx Switch Matrix Status Register - Analog Devices ADuCM356 Reference Manual

Reference Manual
REGISTER DETAILS: PROGRAMMABLE SWITCHES
Table 148. Bit Descriptions for TSWFULLCON (Continued)
Bits Bit Name Settings
5 T6
4 T5
3 T4
2 T3
1 T2
0 T1

DX SWITCH MATRIX STATUS REGISTER

Address: 0x400C21B0, Reset: 0x00000000, Name: DSWSTA
This gives the status of the Dx switches shown in
Table 149. Bit Descriptions for DSWSTA
Bits Bit Name
[31:8] Reserved
7 D8STA
6 D7STA
5 D6STA
4 D5STA
3 D4STA
2 D3STA
1 D2STA
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Description
1 Switch closed.
Control of T6 Switch. Allows connection of the R
and R resistors.
TIA2_03
0 Switch open.
1 Switch closed.
Control of T5 Switch. Connects high-speed TIA inverting input to the SE0 pin via T9 and R
0 Switch open.
1 Switch closed.
Control of T4 Switch. Connects high-speed TIA inverting input to the AIN3/BUF_VREF1V8 pin via T9.
0 Switch open.
1 Switch closed.
Control of T3 Switch. Connects high-speed TIA inverting input to the AIN2 pin via T9.
0 Switch open.
1 Switch closed.
Control of T2 Switch. Connects high-speed TIA inverting input to the AIN1 pin via T9.
0 Switch open.
1 Switch closed.
Control of T1 Switch. Connects high-speed TIA inverting input to the AIN0 pin via T9.
0 Switch open.
1 Switch closed.
Figure 27.
Settings Description
Reserved.
Status of D8 Switch.
0 Switch open.
1 Switch closed.
Status of D7 Switch.
0 Switch open.
1 Switch closed.
Status of D6 Switch.
0 Switch open.
1 Switch closed.
Status of D5 Switch.
0 Switch open.
1 Switch closed.
Status of D4 Switch.
0 Switch open.
1 Switch closed.
Status of D3 Switch.
0 Switch open.
1 Switch closed.
Status of D2 Switch.
path on to the DE0 input to calibrate the R
CAL
ADuCM356
Reset Access
0x0 R/W
LOAD03
. 0x0 R/W
LOAD02
0x0 R/W
0x0 R/W
0x0 R/W
0x0 R/W
Reset Access
0x0 R
0x0 R
0x0 R
0x0 R
0x0 R
0x0 R
0x0 R
0x0 R
Rev. A | 122 of 312