Reference Manual
REGISTER DETAILS: DIGITAL INPUTS AND OUTPUTS
Not all bits are accessible to the user on every port. Inaccessible
bits are reserved. See
Table 255
bits.
GPIO PORT CONFIGURATION REGISTERS
Address: 0x40020000, Reset: 0x00000000, Name: GP0CON
Address: 0x40020040, Reset: 0x00000000, Name: GP1CON
Address: 0x40020080, Reset: 0x00000000, Name: GP2CON
Table 259. Bit Descriptions for GP0CON, GP1CON, GP2CON
Bits
Bit Name
[31:30]
CON15
[29:28]
CON14
[27:26]
CON13
[25:24]
CON12
[23:22]
CON11
[21:20]
CON10
[19:18]
CON9
[17:16]
CON8
[15:14]
CON7
[13:12]
CON6
[11:10]
CON5
[9:8]
CON4
[7:6]
CON3
[5:4]
CON2
[3:2]
CON1
[1:0]
CON0
1
X is 0 for Port 0, 1 for Port 1, and 2 for Port 2.
GPIO PORT OUTPUT ENABLE REGISTERS
Address: 0x40020004, Reset: 0x0000, Name: GP0OEN
Address: 0x40020044, Reset: 0x0000, Name: GP1OEN
Address: 0x40020084, Reset: 0x0000, Name: GP2OEN
Table 260. Bit Descriptions for GP0OEN, GP1OEN, GP2OEN
Bits
Bit Name
[15:0]
OEN
GPIO PORT INPUT/OUTPUT PULL-UP ENABLE REGISTERS
Address: 0x40020008, Reset: 0x2, Name: GP0PE
Address: 0x40020048, Reset: 0x0002, Name: GP1PE
Address: 0x40020088, Reset: 0x0000, Name: GP2PE
analog.com
for more details on the accessible
1
Settings
Description
Configuration Bits for Port x.15. See
Configuration Bits for Port x.14. See
Configuration Bits for Port x.13. See
Configuration Bits for Port x.12. See
Configuration Bits for Port x.11. See
Configuration Bits for Port x.10. See
Configuration Bits for Port x.9. See
Configuration Bits for Port x.8. See
Configuration Bits for Port x.7. See
Configuration Bits for Port x.6. See
Configuration Bits for Port x.5. See
Configuration Bits for Port x.4. See
Configuration Bits for Port x.3. See
Configuration Bits for Port x.2. See
Configuration Bits for Port x.1. See
Configuration Bits for Port x.0. See
Settings
Description
Pin Output Drive Enable.
0 Disable the output on the corresponding GPIO.
1 Enable the output on the corresponding GPIO.
Table
255.
Table
255.
Table
255.
Table
255.
Table
255.
Table
255.
Table
255.
Table
255.
Table
255.
Table
255.
Table
255.
Table
255.
Table
255.
Table
255.
Table
255.
Table
255.
ADuCM356
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Access
R/W
Rev. A | 214 of 312
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