Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3407

ADSP-SC58x IIR Register Descriptions
IIR Debug Read Data Low Register
The
IIR_DBG_RDDAT_LO
32 bits.
Figure 52-16: IIR_DBG_RDDAT_LO Register Diagram
Table 52-17: IIR_DBG_RDDAT_LO Register Fields
Bit No.
(Access)
31:0 VALUE
(R/NW)
52–26
register is part of the 40-bit wide debug mode read data register and holds the lower
15 14
0 0
VALUE[15:0] (R)
Debug Read Data Lower 32 bits
31 30
0 0
VALUE[31:16] (R)
Debug Read Data Lower 32 bits
Bit Name
Debug Read Data Lower 32 bits.
The IIR_DBG_RDDAT_LO.VALUE bit field holds the lower 32-bit read data.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
13 12 11 10 9 8 7 6
0 0 0 0 0 0 0 0
29 28 27 26 25 24 23 22
0 0 0 0 0 0 0 0
Description/Enumeration
5 4 3 2 1 0
0 0 0 0 0 0
21 20 19 18 17 16
0 0 0 0 0 0