Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3430

Preboot Operations
Table 53-5: SMPU Configuration (Continued)
SMPU Instance
Core_L2_ROM1_Boot_ROM1
DMA_L2_ROM1_Boot_ROM1
Core_L2_ROM2_Boot_ROM2
DMA_L2_ROM2_Boot_ROM2
DMC0
DMC1
Speculative reads are also disabled by setting SMPU_CTL.RSDIS.
Secure Debug Key Processing
In the event the processor is locked, a secure debug key is required to be submitted via the debug tools and matched
with a key on the processor. A 128-bit Secure Debug Key must be provisioned by user prior to locking the device.
The secure debug key is read from the OTP memory and then written to the corresponding register in the TAPC.
After the key has been written the TAPC_SDBGKEY_CTL.VALID bit is set then allowing for a key compare oper-
ation to be performed once the debug tools then submit their key.
It is important that the debug tools wait for the boot software to load the key then set the
TAPC_SDBGKEY_CTL.VALID before submitting the key for comparison.
The 128-bit Secure Debug Key is loaded as follows from the storage area in OTP.
Table 53-6: Secure Debug Key Load Procedure
Secure Debug Key[127:0]
Secure Debug Key[31:0]
Secure Debug Key[63:32]
Secure Debug Key[95:94]
Secure Debug Key[127:96]
A key of 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF provisioned in OTP will result in
CAUTION:
the boot code bypassing the key load operation entirely. If debug access is then ever required the key
must be loaded to the TAPC by user software. If the processor fails to boot perhaps due to corrupted
firmware then the user will have no debug access. The only way to gain access would be to load an
53–10
SMPU In- Open
SMPU_SECURECTL
stance
ue
4 SMPU_SECURECTL.WNSEN |
SMPU_SECURECTL.RNSEN
5 SMPU_SECURECTL.WNSEN |
SMPU_SECURECTL.RNSEN
6 SMPU_SECURECTL.WNSEN |
SMPU_SECURECTL.RNSEN
7 SMPU_SECURECTL.WNSEN |
SMPU_SECURECTL.RNSEN
9 SMPU_SECURECTL.WNSEN |
SMPU_SECURECTL.RNSEN
10 SMPU_SECURECTL.WNSEN |
SMPU_SECURECTL.RNSEN
Register
TAPC_SDBGKEY0
TAPC_SDBGKEY1
TAPC_SDBGKEY2
TAPC_SDBGKEY3
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Val- Locked
SMPU_SECURECTL
Value
0x00000000 (Default Reset Val-
ue)
0x00000000 (Default Reset Val-
ue)
0x00000000 (Default Reset Val-
ue)
0x00000000 (Default Reset Val-
ue)
0x00000000 (Default Reset Val-
ue)
0x00000000 (Default Reset Val-
ue)