Preboot Operations
Storage is provide in OTP for a command item for each of the supported boot modes. The storage is provided in
the
ADI_ROM_OTP_BOOT_CMD_INFO
ing boot modes boot command description for details on the supported command options.
Before programming the boot command to the OTP. It is advisable to thoroughly evaluate the boot com-
NOTE:
mand using the
Once the command is programmed to OTP there is no means to revert to the original default settings.
Boot Mode Specific SPU Configuration
Prior to performing the actual boot process, the processors SPU resources specific to the boot mode selected are
configured. This is performed in the preboot phase as opposed to within the boot mode itself when calling the boot
API as it isolates the security functionality of the processor allowing it to be handled specifically by a separate proc-
ess.
The following additional SPU resources are configured as secure masters according to the boot mode selected.
Table 53-12: Boot Mode Specific SPU Configuration
Boot Mode
SPI Master Boot (Memory Mapped Mode)
SPI Master Boot (Peripheral Mode)
SPI Slave Boot
UART Slave Boot
LINKPORT Slave Boot
Note that for a given boot mode in the table not all the SPU resources are configured. Only a single pe-
NOTE:
ripheral instance is enabled according the peripheral instance selected for boot. For example if the boot
command for the boot mode indicates boot from UART0 only the UART0 Receive DMA is configured,
the other UART Receive DMAs are not configured for secure access.
Executing the Boot Mode
The boot mode is called using the
stream from the configured boot source.
The table below provides default parameters passed to each of the supported boot modes. For details on the API
usage please refer to adi_rom_Boot().
53–18
member of ADI_ROM_OTP_BOOT_INFO . Refer to the correspond-
API to ensure the boot command provides the desired functionality.
adi_rom_Boot()
SPU Endpoint ID
88, 89
106, 104, 102
106, 104, 102
82, 84, 86
5, 6
adi_rom_Boot()
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Master Name
MDMA0 Source DMA Channel, MDMA0
Destination DMA Channel
SPI2 Receive DMA, SPI1 Receive DMA,
SPI0 Receive DMA
SPI2 Receive DMA, SPI1 Receive DMA,
SPI0 Receive DMA
UART 0 Receive DMA, UART1 Receive
DMA, UART2 Receive DMA
LINKPORT0 DMA, LINKPORT1 DMA
routine resulting in the fetching and processing of the boot
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