Analog Devices ADSP-SC58 Series Hardware Reference Manual page 3441

When auto-device detection is enabled, the SPI memory is initially read using the standard 0x03 SPI read command
with a reduced clocking frequency for maximum compatibility. The first nibble of the boot stream is then used to
reconfigure the SPI interface and possible the SPI flash. Refer to
NOTE: Support for automatic device detection via the first nibble of the boot stream is not supported when boot-
ing secure boot streams. Instead when signing the boot image an attribute can be set in the image header
that specifies the configuration to use.
For booting, the SPI memory is connected as shown in the SPI Memory Connections figure.
Figure 53-1: SPI Memory Connections
The pull-up resistor on the slave select signal ensures that the memory is deselected when the pin is in a high-impe-
dance mode such as during reset.
Initialization codes are allowed to manipulate
mechanism to a second SPI memory connected to another slave select pin. Updating the field that specifies the slave
select signal for use allows the boot process to manage larger boot streams than are able to fit in a single SPI device.
If modifying the slave select signal used during the boot process, configure the pin multiplexing to enable
NOTE:
the correct functionality for the pin. Once the boot process has proceeded past the configuration function
and the boot process has actually started, the boot kernel will not perform any further pin multiplexing
operations.
For SPI master boot peripheral mode, the SPE, MSTR, and SZ bits are set in the SPIx_CTL register. The
TIMOD=2 bits enable the receive DMA mode. The CPOL and CPHA bits are set by default, resulting in SPI mode
3. The boot kernel does not allow SPIx hardware to control the SPI_SEL[n] pin. Instead, software toggles this
pin.
SPI Device Detection Routine
Since the boot mode supports booting from various SPI memories, the boot kernel automatically detects what type
of memory is connected. To determine whether the SPI memory device requires an 8, 16, 24, or 32-bit addressing
scheme, the boot kernel performs a device detection sequence prior to booting. The SPI_MISO signal requires a
pull-up resistor. The routine relies on the fact that memories do not drive their data outputs unless the right number
of address bytes are received.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
SPI Device Detection
V DDEXT
PROCESSOR SPI PORT
10 kohm
10 kohm
SCK
SPIx_CLK
CS
SPIx_SELx
MOSI
SPIx_MOSI
MISO
SPIx_MISO
D2
SPIx_D2
SPIx_D3 D3
10 kohm
ADI_ROM_BOOT_CONFIG::dBootCommand
Routine.
SPI MEMORY
Boot Modes
to extend the boot
53–21