17.3.2 Control Signal Timing
Control signal timing is shown as follows:
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Reset input timing
Figure 17-7 shows the reset input timing.
Reset output timing
Figure 17-8 shows the reset output timing.
Interrupt input timing
Figure 17-9 shows the input timing for NMI and IRQ
ø
RES
Figure 17-7 Reset Input Timing
ø
RESO
Figure 17-8 Reset Output Timing
to IRQ
4
t
RESS
t
t
RESD
RESD
442
.
0
t
RESS
t
RESW
t
RESOW