Hitachi H8/3032 Series Hardware Manual page 467

T able A-1 Instruction Set (cont)
I
Mnemonic
INC.L #1, ERd
INC.L #2, ERd
DAA Rd
SUB.B Rs, Rd
SUB.W #xx:16, Rd
SUB.W Rs, Rd
SUB.L #xx:32, ERd
SUB.L ERs, ERd
SUBX.B #xx:8, Rd
SUBX.B Rs, Rd
SUBS.L #1, ERd
SUBS.L #2, ERd
SUBS.L #4, ERd
DEC.B Rd
DEC.W #1, Rd
DEC.W #2, Rd
DEC.L #1, ERd
DEC.L #2, ERd
DAS.Rd
MULXU. B Rs, Rd
MULXU. W Rs, ERd
MULXS. B Rs, Rd
MULXS. W Rs, ERd
DIVXU. B Rs, Rd
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Addressing Mode and
Instruction Length (bytes)
Operation
ERd32+1 → ERd32
L 2
ERd32+2 → ERd32
L 2
B Rd8 decimal adjust 2
→ Rd8
Rd8–Rs8 → Rd8
B 2
W Rd16–#xx:16 → Rd16
4
W Rd16–Rs16 → Rd16
2
L ERd32–#xx:32 6
→ ERd32
L ERd32–ERs32 2
→ ERd32
Rd8–#xx:8–C → Rd8
B 2
Rd8–Rs8–C → Rd8
B 2
ERd32–1 → ERd32
L 2
ERd32–2 → ERd32
L 2
ERd32–4 → ERd32
L 2
Rd8–1 → Rd8
B 2
W Rd16–1 → Rd16
2
W Rd16–2 → Rd16
2
ERd32–1 → ERd32
L 2
ERd32–2 → ERd32
L 2
B Rd8 decimal adjust 2
→ Rd8
Rd8 × Rs8 → Rd16
B 2
(unsigned multiplication)
W Rd16 × Rs16 → ERd32
2
(unsigned multiplication)
Rd8 × Rs8 → Rd16
B 4
(signed multiplication)
W Rd16 × Rs16 → ERd32
4
(signed multiplication)
Rd16 ÷ Rs8 → Rd16
B 2
(RdH: remainder,
RdL: quotient)
(unsigned division)
452
No. of
*1
States
Condition Code
I H N Z V C
— — — 2
— — — 2
— * * — 2
— 2
— 1 4
— 1 2
— 2 6
— 2 2
— 2
3
— 3 2
— — — — — — 2
— — — — — — 2
— — — — — — 2
— — — 2
— — — 2
— — — 2
— — — 2
— — — 2
— * * — 2
— — — — — — 14
— — — — — — 22
— — — — 16
— — — — 24
— — 6 7 — — 14