Hitachi H8/3032 Series Hardware Manual page 46

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Table 2-4 Arithmetic Operation Instructions (cont)
Instruction Size* Function
Rd ÷ Rs → Rd
DIVXU B/W
Performs unsigned division on data in two general registers: either
16 bits ÷ 8 bits → 8-bit quotient and 8-bit remainder or 32 bits ÷ 16 bits →
16-bit quotient and 16-bit remainder.
Rd ÷ Rs → Rd
DIVXS B/W
Performs signed division on data in two general registers: either
16 bits ÷ 8 bits → 8-bit quotient and 8-bit remainder, or 32 bits ÷ 16 bits →
16-bit quotient and 16-bit remainder.
CMP B/W/L Rd – Rs, Rd – #IMM
Compares data in a general register with data in another general register or
with immediate data, and sets CCR according to the result.
0 – Rd → Rd
NEG B/W/L
Takes the two's complement (arithmetic complement) of data in a general
register.
Rd (sign extension) → Rd
EXTS W/L
Extends byte data in the lower 8 bits of a 16-bit register to word data, or
extends word data in the lower 16 bits of a 32-bit register to longword data,
by extending the sign bit.
Rd (zero extension) → Rd
EXTU W/L
Extends byte data in the lower 8 bits of a 16-bit register to word data, or
extends word data in the lower 16 bits of a 32-bit register to longword data,
by padding with zeros.
Note: * Size refers to the operand size.
B: Byte
W: Word
L: Longword
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