Hitachi H8/3032 Series Hardware Manual page 544

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ISCR—IRQ Sense Control Register
Bit 7
—
Initial value 0
Read/Write R/W
IER—IRQ Enable Register
Bit 7
—
Initial value 0
Read/Write R/(W)
6 5 4
— — IRQ4SC IRQ3SC
0 0 0
R/W R/W R/W R/W
IRQ to IRQ sense control
4 0
0 Interrupts are requested when IRQ to IRQ inputs are low
1 Interrupts are requested by falling-edge input at IRQ to IRQ
6 5 4
— — IRQ4E IRQ3E
0 0 0
R/(W) R/(W) R/(W) R/(W)
IRQ to IRQ enable
4
0 IRQ to IRQ interrupts are disabled
1 IRQ to IRQ interrupts are enabled
529
H'F4 Interrupt controller
3 2 1 0
IRQ2SC IRQ1SC IRQ0SC
0 0 0 0
R/W R/W R/W
4 0
4
H'F5 Interrupt controller
3 2 1 0
IRQ2E IRQ1E IRQ0E
0 0 0 0
R/(W) R/(W) R/(W)
0
4 0
4 0
0